Inventor

WIEDENMAN GREGORY B

US18 patents

⚠️ This page may combine multiple inventors who share the name “WIEDENMAN GREGORY B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WIEDENMAN GREGORY B

UNISYS CORP

Programmable error detect/mask utilizing bus history stack

Performance monitor for digital computer system

Multiple power domain power loss detection and interface disable

Fault tolerant clock distribution system

Method and apparatus for spawning multiple requests from a single entry of a queue

Method and apparatus for stacked address, bus to memory data transfer

Method and apparatus for recording and monitoring bus activity in a multi-processor environment

Buffered transfer of data blocks between memory and processors independent of the order of allocation of locations in the buffer

Method and apparatus for multiple sequence access to single entry queue

Detection of skew fault in a multiple clock system

Method and apparatus for providing overlapping defer phase responses

Architecture for smart control of bi-directional transfer of data

Bus grant overlap circuit

SPERRY RAND CORP

Apparatus and method for receiving and servicing request signals from peripheral devices in a data processing system

Buffer memory arrangement

Error detection system

SPERRY CORP

Method and apparatus for high speed graphics fill

Programmable video display character control circuit using multi-purpose RAM for display attributes, character generator, and refresh memory