Inventor
CHARY RASOJU VEERABADRA
IN6 patents
⚠️ This page may combine multiple inventors who share the name “CHARY RASOJU VEERABADRA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LSI CORP
3 patentsUS9177633B2Nov 3, 2015
Bit line write assist for static random access memory architectures
LSI CORP16 citations82
US9111637B1Aug 18, 2015
Differential latch word line assist for SRAM
LSI CORP8 citations82
US9177635B1Nov 3, 2015
Dual rail single-ended read data paths for static random access memories
LSI CORP4 citations71
EVANS DONALD ALBERT
2 patentsUS8773927B2Jul 8, 2014
Adjusting bit-line discharge time in memory arrays based on characterized word-line delay and gate delay
EVANS DONALD ALBERT7 citations75
US8787099B2Jul 22, 2014
Adjusting access times to memory cells based on characterized word-line delay and gate delay
EVANS DONALD ALBERT2 citations54