Inventor

YAN JIANG

US50 patents

⚠️ This page may combine multiple inventors who share the name “YAN JIANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YAN JIANG

INFINEON TECHNOLOGIES AG

Semiconductor method and device with mixed orientation substrate

Strained semiconductor device and method of making same

Method of forming shallow trench isolation using deep trench isolation

Embedded flash memory devices on SOI substrates and methods of manufacture thereof

Methods of operating embedded flash memory devices

Embedded flash memory devices on SOI substrates and methods of manufacture thereof

Formation of active area using semiconductor growth process without STI integration

Semiconductor devices having pFET with SiGe gate electrode and embedded SiGe source/drain regions and methods of making the same

Formation of active area using semiconductor growth process without STI integration

Formation of active area using semiconductor growth process without STI integration

Semiconductor method and device with mixed orientation substrate

Silicided semiconductor structure and method of forming the same

Silicon-on-insulator chip having multiple crystal orientations

Mixed orientation semiconductor device and method

Methods of forming conductive features and structures thereof

Transistor fabrication methods and structures thereof

YAN JIANG

Formation of active area using semiconductor growth process without STI integration

Mixed orientation semiconductor device and method

Strained semiconductor device and method of making same

Strained semiconductor device and method of making same

Shallow trench isolation structure, manufacturing method thereof and a device based on the structure

Method for manufacturing contact holes in CMOS device using gate-last process

Electronic scale

Silicided semiconductor structure and method of forming the same

IBM

Self-aligned dual segment liner and method of manufacturing the same

Forming conductive stud for semiconductive devices

Post-silicide spacer removal

Forming conductive stud for semiconductive devices

Pre-silicide spacer removal

INST OF MICROELECTRONICS CAS

Method for manufacturing dummy gate in gate-last process and dummy gate in gate-last process

Methods for forming metal silicide

Semiconductor device and method for manufacturing the same

Method for adjusting effective work function of metal gate

Method for making HKMG dummy gate structure with amorphous/ONO masking structure and procedure

UNIV TEXAS

Ultra thin dielectric for electronic devices and method of making same

Method of making an ultra thin dielectric for electronic devices

YANG TAO

Method for monitoring the removal of polysilicon pseudo gates

Method of manufacturing dummy gates in gate last process

HAN JIN-PING

Semiconductor device and method of making same

Semiconductor devices having pFET with SiGe gate electrode and embedded SiGe source/drain regions and methods of making the same

LI CHUNLONG

Method for manufacturing dummy gate in gate-last process and dummy gate in gate-last process

Method for manufacturing dummy gate in gate-last process and dummy gate in gate-last process

TENCENT TECH SHENZHEN CO LTD

Method and apparatus for displaying virtual scene, terminal, and storage medium

Method and apparatus for displaying picture of virtual environment, device, and medium

TILKE ARMIN

Silicon-on-insulator chip having multiple crystal orientations

ZHONG HUICAI

Semiconductor device, formation method thereof, and package structure

YIN HUAXIANG

Method of manufacturing semiconductor device

SZ DJI TECHNOLOGY CO LTD

Method, device, and storage medium for flight trajectory replay

YANG HONG

Method for forming gate structure, method for forming semiconductor device, and semiconductor device

FU ZUOZHEN

Method for forming tin by PVD