P

Inventor

GHOSH SOMNATH

US45 patents
⚠️ This page may combine multiple inventors who share the name “GHOSH SOMNATH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

28 patents
US12444653B2Oct 14, 2025

Buried power rail at tight cell-to-cell space

IBM2 citations74
US12268031B2Apr 1, 2025

Backside power rails and power distribution network for density scaling

IBM2 citations74
US11139201B2Oct 5, 2021

Top via with hybrid metallization

IBM2 citations73
US10998193B1May 4, 2021

Spacer-assisted lithographic double patterning

IBM2 citations72
US12568814B2Mar 3, 2026

Buried power rail directly contacting backside power delivery network

IBM0 citations63
US12394660B2Aug 19, 2025

Buried power rail after replacement metal gate

IBM1 citations63
US12148833B2Nov 19, 2024

Three-dimensional, monolithically stacked field effect transistors formed on the front and backside of a wafer

IBM0 citations63
US11817501B2Nov 14, 2023

Three-dimensional, monolithically stacked field effect transistors formed on the front and backside of a wafer

IBM0 citations63
US11004736B2May 11, 2021

Integrated circuit having a single damascene wiring network

IBM1 citations63
US12593468B2Mar 31, 2026

Self-aligned backside contact with increased contact area

IBM0 citations62
US12400871B2Aug 26, 2025

Metal lines with low via-to-via spacing

IBM0 citations62
US12020949B2Jun 25, 2024

Subtractive patterning of interconnect structures

IBM0 citations62
US11990412B2May 21, 2024

Buried power rails located in a base layer including first, second, and third etch stop layers

IBM1 citations62
US11854884B2Dec 26, 2023

Fully aligned top vias

IBM0 citations62
US11682617B2Jun 20, 2023

High aspect ratio vias for integrated circuits

IBM1 citations62
US11270913B2Mar 8, 2022

BEOL metallization formation

IBM0 citations62
US11217481B2Jan 4, 2022

Fully aligned top vias

IBM0 citations62
US11688636B2Jun 27, 2023

Spin on scaffold film for forming topvia

IBM0 citations61
US12046511B2Jul 23, 2024

Selective metal residue and liner cleanse for post-subtractive etch

IBM0 citations60
US12550711B2Feb 10, 2026

Interconnection fabric for buried power distribution

IBM0 citations52
US11244897B2Feb 8, 2022

Back end of line metallization

IBM0 citations52
US11177160B2Nov 16, 2021

Double patterned lithography using spacer assisted cuts for patterning steps

IBM0 citations52
US11062943B2Jul 13, 2021

Top via interconnects with wrap around liner

IBM0 citations52
US11024551B1Jun 1, 2021

Metal replacement vertical interconnections for buried capacitance

IBM0 citations52
US11527434B2Dec 13, 2022

Line cut patterning using sacrificial material

IBM0 citations51
US11158536B2Oct 26, 2021

Patterning line cuts before line patterning using sacrificial fill material

IBM0 citations51
US11830778B2Nov 28, 2023

Back-side wafer modification

IBM0 citations50
US11302571B2Apr 12, 2022

Cut integration for subtractive first metal line with bottom up second metal line

IBM0 citations48

INTEL CORP

5 patents

HONEYWELL INT INC

5 patents

GLOBALFOUNDRIES INC

5 patents

GOEL ANIL

2 patents