Inventor
AOYAMA MASAHARU
JP19 patents
⚠️ This page may combine multiple inventors who share the name “AOYAMA MASAHARU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TOKYO SHIBAURA ELECTRIC CO
11 patentsUS4507673AMar 26, 1985
Semiconductor memory device
TOKYO SHIBAURA ELECTRIC CO174 citations99
US4561009ADec 24, 1985
Semiconductor device
TOKYO SHIBAURA ELECTRIC CO41 citations96
US4520041AMay 28, 1985
Method for forming metallization structure having flat surface on semiconductor substrate
TOKYO SHIBAURA ELECTRIC CO65 citations96
US4334349AJun 15, 1982
Method of producing semiconductor device
TOKYO SHIBAURA ELECTRIC CO64 citations96
US4853760AAug 1, 1989
Semiconductor device having insulating layer including polyimide film
TOKYO SHIBAURA ELECTRIC CO36 citations92
US4636832AJan 13, 1987
Semiconductor device with an improved bonding section
TOKYO SHIBAURA ELECTRIC CO41 citations92
US4433004AFeb 21, 1984
Semiconductor device and a method for manufacturing the same
TOKYO SHIBAURA ELECTRIC CO32 citations92
US4462856AJul 31, 1984
System for etching a metal film on a semiconductor wafer
TOKYO SHIBAURA ELECTRIC CO10 citations74
US4240096ADec 16, 1980
Fluorine-doped P type silicon
TOKYO SHIBAURA ELECTRIC CO14 citations73
US4403392ASep 13, 1983
Method of manufacturing a semiconductor device
TOKYO SHIBAURA ELECTRIC CO9 citations71
US4200969AMay 6, 1980
Semiconductor device with multi-layered metalizations
TOKYO SHIBAURA ELECTRIC CO6 citations63
TOSHIBA KK
8 patentsUS5266526ANov 30, 1993
Method of forming trench buried wiring for semiconductor device
TOSHIBA KK511 citations99
US4618878AOct 21, 1986
Semiconductor device having a multilayer wiring structure using a polyimide resin
TOSHIBA KK268 citations99
US4717682AJan 5, 1988
Method of manufacturing a semiconductor device with conductive trench sidewalls
TOSHIBA KK30 citations92
US4634496AJan 6, 1987
Method for planarizing the surface of an interlayer insulating film in a semiconductor device
TOSHIBA KK52 citations92
US4613888ASep 23, 1986
Semiconductor device of multilayer wiring structure
TOSHIBA KK30 citations92
US4766086AAug 23, 1988
Method of gettering a semiconductor device and forming an isolation region therein
TOSHIBA KK46 citations91
US4728627AMar 1, 1988
Method of making multilayered interconnects using hillock studs formed by sintering
TOSHIBA KK15 citations74
US5175115ADec 29, 1992
Method of controlling metal thin film formation conditions
TOSHIBA KK10 citations73