Inventor

FRANOSCH MARTIN

DE48 patents

⚠️ This page may combine multiple inventors who share the name “FRANOSCH MARTIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FRANOSCH MARTIN

INFINEON TECHNOLOGIES AG

Method for producing a cover, method for producing a packaged device

Method for producing a vertical semiconductor transistor component and vertical semiconductor transistor component

Method for fabricating a bipolar transistor and method for fabricating an integrated circuit configuration having such a bipolar transistor

Apparatus for housing a micromechanical structure

Apparatus for housing a micromechanical structure and method for producing the same

Method for fabricating trench capacitors and semiconductor device with trench capacitors

Configuration and method for making contact with the back surface of a semiconductor substrate

Silicon bipolar transistor, circuit arrangement and method for producing a silicon bipolar transistor

Method for producing a protective cover for a device

Method for generating a protective cover for a device

Method for producing a protective cover for a device

Method for the manufacture of micro-mechanical components

Process for the simultaneous deposition of crystalline and amorphous layers with doping

Bipolar transistor and method for fabricating it

Bipolar transistor and method of fabricating a bipolar transistor

Method for making electrical contact with a rear side of a semiconductor substrate during its processing

Method for producing a polymer structure on a substrate surface

Electrical device with protruding contact elements and overhang regions over a cavity

Apparatus comprising a device and method for producing it

Bipolar transistor

Contact spring configuration for contacting a semiconductor wafer and method for producing a contact spring configuration

Storage capacitor for a DRAM

Method for housing an electronic component in a device package and an electronic component housed in the device package

DRAM memory capacitor having three-layer dielectric, and method for its production

SIEMENS AG

Integrated CMOS circuit arrangement and method for the manufacture thereof

Electrically programmable non-volatile memory cell configuration

Method of operating a storage cell arrangement

Method for manufacturing fine structures

Method for the fabrication of a doped silicon layer

Method of producing a MOS transistor

Manufacturing method for a capacitor in an integrated storage circuit

Manufacturing method for a capacitor in an integrated memory circuit

Method for fabricating a capacitor for a semiconductor memory configuration

Process of forming a semiconductor capacitor including forming a hemispherical grain statistical mask with silicon and germanium

Method for fabricating a dopant region

Method for manufacturing a capacitor for a semiconductor arrangement

Process for manufacturing capacitors in a solid state configuration

Integrated electrical circuit having at least one memory cell and method for fabricating it

OPPERMANN KLAUS-GUENTER

Method for housing an electronic component in a device package and an electronic component housed in the device package

Electrical device with protruding contact elements and overhang regions over a cavity

Semiconductor device layer structure and method of fabrication

Method for developing a photoresist

SCHAEFER HERBERT

Process for the simultaneous deposition of crystalline and amorphous layers with doping

Process for the simultaneous deposition of crystalline and amorphous layers with doping

AVAGO TECHNOLOGIES WIRELESS IP

Bulk acoustic wave device and a method of its manufacturing

QIMONDA AG

Solder contacts and methods of forming same

HUEBNER HOLGER

Electronic device and method of manufacturing same

AVAGO TECH INT SALES PTE LID

Polymer lid wafer-level package with an electrically and thermally conductive pillar