Inventor

SUBRAMANIAN SRIDHAR P

US25 patents

⚠️ This page may combine multiple inventors who share the name “SUBRAMANIAN SRIDHAR P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SUBRAMANIAN SRIDHAR P

APPLE INC

Non-blocking address switch with shallow per agent queues

Retry mechanism

Combined single error correction/device kill detection code

Non-blocking address switch with shallow per agent queues

Memory controller with loopback test interface

Oversampling-based scheme for synchronous interface communication

Latency reduction for cache coherent bus-based cache

Latency reduction for cache coherent bus-based cache

Latency reduction for cache coherent bus-based cache

Retry mechanism

ADVANCED MICRO DEVICES INC

Stride based prefetcher with confidence counter and dynamic prefetch-ahead mechanism

Method for ordering a request for access to a system memory using a reordering buffer or FIFO

Distributed translation look-aside buffers for graphics address remapping table

Optimizing the translation of virtual addresses into physical addresses using a pipeline implementation for least recently used pointer

Gear box for multiple clock domains

Optimized static sliding-window for ACK sampling

PA SEMI INC

Non-blocking address switch with shallow per agent queues

Combined buffer for snoop, store merging, load miss, and writeback operations

Retry mechanism in cache coherent communication among agents

Segmented interconnect for connecting multiple agents in a system

Segmented interconnect for connecting multiple agents in a system

BODROZIC LUKA

Memory controller with loopback test interface

Memory controller with loopback test interface

LILLY BRIAN P

Combined single error correction/device kill detection code

SUBRAMANIAN SRIDHAR P

Oversampling-based scheme for synchronous interface communication