Inventor

IVANOVIC LAV D

US17 patents

⚠️ This page may combine multiple inventors who share the name “IVANOVIC LAV D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IVANOVIC LAV D

LSI CORP

Low density parity check decoder with miscorrection handling

High performance arithmetic logic unit (ALU) for cryptographic applications with built-in countermeasures against side channel attacks

Multimode block cipher architectures

OPC based illumination optimization with mask error constraints

Low depth programmable priority encoders

Flexible hardware architecture for ECC/HECC based cryptography

Majority-tabular post processing of quasi-cyclic low-density parity-check codes

LSI LOGIC CORP

Built-in test for multiple memory circuits

Power routing with obstacles

YANG SHAOHUA

Systems and methods for variable redundancy data protection

Systems and methods for locating and correcting decoder mis-corrections

ZHANG FAN

LDPC decoder trapping set identification

BOLOTOV ANATOLI A

Dynamically controlling the number of local iterations in an iterative decoder

FILSETH PAUL G

Alternate galois field advanced encryption standard round

HAN YANG

Correcting errors in miscorrected codewords using list decoding

GRINCHUK MIKHAIL

Low depth programmable priority encoders

GASHKOV SERGEY B

Low depth combinational finite field multiplier