Inventor

SARDESAI VIRAJ YASHAWANT

US8 patents

⚠️ This page may combine multiple inventors who share the name “SARDESAI VIRAJ YASHAWANT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ALPTEKIN EMRE

3 patents

US8415250B2Apr 9, 2013

Method of forming silicide contacts of different shapes selectively on regions of a semiconductor device

ALPTEKIN EMRE40 citations92

US8946081B2Feb 3, 2015

Method for cleaning semiconductor substrate

ALPTEKIN EMRE0 citations49

US9059308B2Jun 16, 2015

Method of manufacturing dummy gates of a different material as insulation between adjacent devices

ALPTEKIN EMRE0 citations37

GLOBALFOUNDRIES INC

2 patents

US9530684B2Dec 27, 2016

Method and structure to suppress finFET heating

GLOBALFOUNDRIES INC2 citations60

US9368493B2Jun 14, 2016

Method and structure to suppress FinFET heating

GLOBALFOUNDRIES INC0 citations50

UTOMO HENRY K

1 patent

US8420491B2Apr 16, 2013

Structure and method for replacement metal gate field effect transistors

UTOMO HENRY K7 citations80

IBM

1 patent

US10916431B2Feb 9, 2021

Robust gate cap for protecting a gate from downstream metallization etch operations

IBM0 citations46

SARDESAI VIRAJ YASHAWANT

1 patent

US8420542B2Apr 16, 2013

Method of patterned image reversal

SARDESAI VIRAJ YASHAWANT0 citations44