Inventor

CHEAH BOK ENG

MY139 patents

⚠️ This page may combine multiple inventors who share the name “CHEAH BOK ENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHEAH BOK ENG

INTEL CORP

Electronic device with flexible hinge

Stacked die package

Stacked-die packages with silicon vias and surface activated bonding

Systems in packages including wide-band phased-array antennas and methods of assembling same

Systems in packages including wide-band phased-array antennas and methods of assembling same

Multi-die semiconductor structure with intermediate vertical side chip and semiconductor package for same

Multi-die semiconductor structure with intermediate vertical side chip and semiconductor package for same

Low-profile hinge for an electronic device

Portable computing device with low profile hinge

Package on package design to improve functionality and efficiency

Micro through-silicon via for transistor density scaling

Multi-orientation display device

Ring-in-ring configurable-capacitance stiffeners and methods of assembling same

Micro-hinge for an electronic device

Micro-hinge for an electronic device

Hybrid ball grid array package for high speed interconnects

Stepped interposer for stacked chip package

Three dimensional foldable substrate with vertical side interface

Semiconductor package with hybrid through-silicon-vias

Integrated bridge for die-to-die interconnects

Substrate with gradiated dielectric for reducing impedance mismatch

Stiffener-integrated interconnect bypasses for chip-package apparatus and methods of assembling same

Electronic packages with stacked sitffeners and methods of assembling same

Overpass dice stacks and methods of using same

Integrated circuit packages with conductive element having cavities housing electrically connected embedded components

Interposer with flexible portion

Micro-hinge for an electronic device

Semiconductor package with package components disposed on a package substrate within a footprint of a die

Microelectronic device package having alternately stacked die

Capacitive compensation structures using partially meshed ground planes

Package-bottom through-mold via interposers for land-side configured devices for system-in-package apparatus

Microelectronic device having an air core inductor

Flexible system-in-package solutions for wearable devices

Micro through-silicon via for transistor density scaling

Stacked through-silicon vias for multi-device packages

Power delivery for embedded interconnect bridge devices and methods

Foldable fabric-based packaging solution

Packaged die stacks with stacked capacitors and methods of assembling same

Over-molded IC package with in-mold capacitor

Ring-in-ring configurable-capacitance stiffeners and methods of assembling same

Packaged die stacks with stacked capacitors and methods of assembling same

Vertical trench routing in a substrate

CHEAH BOK ENG

High-density inter-package connections for ultra-thin package-on-package structures, and processes of forming same

Method to enable controlled side chip interconnection for 3D integrated packaging system

Stacked die package

High density second level interconnection for bumpless build up layer (BBUL) packaging technology

PERIAMAN SHANGGAR

Die backside wire bond technology for single or stacked die package

Die backside metallization and surface activated bonding for stacked die packages

CHEW YEN HSIANG

Firmware verification using system memory error check logic

OOI TOONG ERH

Embedded die-down package-on-package device