Inventor
LEWIS SCOTT C
US47 patents
⚠️ This page may combine multiple inventors who share the name “LEWIS SCOTT C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
24 patentsUS5134616AJul 28, 1992
Dynamic ram with on-chip ecc and optimized bit and word redundancy
IBM173 citations97
US5814980ASep 29, 1998
Wide range voltage regulator
IBM21 citations93
US5015880AMay 14, 1991
CMOS driver circuit
IBM27 citations92
US9911492B2Mar 6, 2018
Writing multiple levels in a phase change memory using a write reference voltage that incrementally ramps over a write period
IBM9 citations91
US10535403B2Jan 14, 2020
Writing multiple levels in a phase change memory
IBM3 citations84
US9502107B2Nov 22, 2016
Writing multiple levels in a phase change memory
IBM3 citations82
US5995440ANov 30, 1999
Off-chip driver and receiver circuits for multiple voltage level DRAMs
IBM15 citations74
US4433252AFeb 21, 1984
Input signal responsive pulse generating and biasing circuit for integrated circuits
IBM15 citations74
US11152063B2Oct 19, 2021
Writing multiple levels in a phase change memory
IBM0 citations73
US10943658B2Mar 9, 2021
Writing multiple levels in a phase change memory
IBM0 citations73
US10937496B2Mar 2, 2021
Writing multiple levels in a phase change memory
IBM0 citations73
US10572799B2Feb 25, 2020
Neuron peripheral circuits for neuromorphic synaptic memory array based on neuron models
IBM3 citations73
US10169701B2Jan 1, 2019
Neuron peripheral circuits for neuromorphic synaptic memory array based on neuron models
IBM1 citations73
US6014046AJan 11, 2000
Off chip driver (OCD) with variable drive capability for noise control
IBM8 citations73
US10998045B2May 4, 2021
Writing multiple levels in a phase change memory
IBM0 citations62
US10692576B2Jun 23, 2020
Writing multiple levels in a phase change memory
IBM0 citations62
US10566057B2Feb 18, 2020
Writing multiple levels in a phase change memory
IBM0 citations62
US10424375B2Sep 24, 2019
Writing multiple levels in a phase change memory
IBM0 citations62
US10037802B2Jul 31, 2018
Phase change memory with an incrementally ramped write-reference voltage and an incrementally ramped read-reference voltage
IBM0 citations62
US9299431B2Mar 29, 2016
Writing multiple levels in a phase change memory using a write/read reference voltage ramping up over a write/read period
IBM1 citations62
US4999815AMar 12, 1991
Low power addressing systems
IBM3 citations61
US4719600AJan 12, 1988
Sense circuit for multilevel storage system
IBM6 citations56
US11056185B2Jul 6, 2021
Apparatus for deep learning operations on resistive crossbar array
IBM0 citations52
US10762959B2Sep 1, 2020
Writing multiple levels in a phase change memory
IBM0 citations52
CHIRON DIAGNOSTICS CORP
6 patentsUS5741708AApr 21, 1998
Automated analyzer having magnetic isolation device and method using the same
CHIRON DIAGNOSTICS CORP95 citations98
US5653940AAug 5, 1997
Luminometer for an automated analyzer
CHIRON DIAGNOSTICS CORP113 citations97
US5637275AJun 10, 1997
Automated analyzer with reagent agitating device
CHIRON DIAGNOSTICS CORP159 citations97
US6063340AMay 16, 2000
Reagent container for automated analyzer
CHIRON DIAGNOSTICS CORP63 citations96
USD382061SAug 5, 1997
Fluid bottle
CHIRON DIAGNOSTICS CORP22 citations91
US5679948AOct 21, 1997
Constant luminescence source module for an automated analyzer
CHIRON DIAGNOSTICS CORP11 citations80
BAYER AG
4 patentsUS6436349B1Aug 20, 2002
Fluid handling apparatus for an automated analyzer
BAYER AG149 citations97
US6555062B1Apr 29, 2003
Reagent container for an automated analyzer
BAYER AG41 citations96
US6498037B1Dec 24, 2002
Method of handling reagents in a random access protocol
BAYER AG92 citations96
US6074615AJun 13, 2000
Reagent container for an automated analyzer
BAYER AG54 citations96