Inventor

GOTTSCHLICH JUSTIN E

US63 patents

⚠️ This page may combine multiple inventors who share the name “GOTTSCHLICH JUSTIN E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GOTTSCHLICH JUSTIN E

INTEL CORP

Coordination and increased utilization of graphics processors during inference

Programmable coarse grained and sparse matrix compute hardware with advanced scheduling

Autonomous vehicle advanced sensing and response

Programmable coarse grained and sparse matrix compute hardware with advanced scheduling

Neural network scheduling mechanism

Efficient sharing and compression expansion of data across processing systems

Compute optimization mechanism for deep neural networks

Autonomous machines through cloud, error corrections, and predictions

Extend GPU/CPU coherency to multi-GPU cores

Replay execution of instructions in thread chunks in the chunk order recorded during previous execution

Processor with memory race recorder to record thread interleavings in multi-threaded software

Compute optimization mechanism for deep neural networks

Dynamic distributed training of machine learning models

Compute optimization mechanism for deep neural networks

Efficient sharing and compression expansion of data across processing systems

Extend GPU/CPU coherency to multi-GPU cores

Neural network optimization mechanism

Compute optimization mechanism for deep neural networks

Coordination and increased utilization of graphics processors during inference

Programmable coarse grained and sparse matrix compute hardware with advanced scheduling

Extend GPU/CPU coherency to multi-GPU cores

Enabling maximum concurrency in a hybrid transactional memory system

Autonomous vehicle advanced sensing and response

Techniques for detecting race conditions

Processor with transactional capability and logging circuitry to report transactional operations

Methods and apparatus to generate anomaly detection datasets

Neural network scheduling mechanism

Shared memory interleavings for instruction atomicity violations

Detecting mobile device sensor malfunctions

Coordination and increased utilization of graphics processors during inference

Compute optimization mechanism for deep neural networks

Coordination and increased utilization of graphics processors during inference

Efficient sharing and compression expansion of data across processing systems

Extend GPU/CPU coherency to multi-GPU cores

Storage management for machine learning at autonomous machines

Compute optimization mechanism for deep neural networks

Compute optimization mechanism for deep neural networks

Coordination and increased utilization of graphics processors during inference

Compute optimization mechanism for deep neural networks

Compute optimization mechanism for deep neural networks

Transactional memory management techniques

Neural network scheduling mechanism

Neural network optimization mechanism

Programmable coarse grained and sparse matrix compute hardware with advanced scheduling

Neural network scheduling mechanism

Programmable coarse grained and sparse matrix compute hardware with advanced scheduling

Smart autonomous machines utilizing cloud, error corrections, and predictions

GOTTSCHLICH JUSTIN E

Unbounded transactional memory with forward progress guarantees using a hardware global lock

Methods and apparatus to manage concurrent predicate expressions

DAUTENHAHN NATHAN D

Mechanism for facilitating dynamic and efficient management of instruction atomicity violations in software programs at computing systems