P

Inventor

PU SUO MING

CN5 patents
⚠️ This page may combine multiple inventors who share the name “PU SUO MING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

3 patents
US10528698B2Jan 7, 2020

Enhancing integrated circuit noise performance

IBM0 citations49
US10528699B2Jan 7, 2020

Enhancing integrated circuit noise performance

IBM0 citations49
US10242149B2Mar 26, 2019

Enhancing integrated circuit noise performance

IBM0 citations49

GE LIANG

1 patent
US8453085B2May 28, 2013

Method for estimating the latency time of a clock tree in an ASIC design

GE LIANG4 citations57

PU SUO MING

1 patent
US8302048B2Oct 30, 2012

Method and apparatus for detecting contradictory timing constraint conflicts

PU SUO MING2 citations49