Inventor
POLEPEDDI TAARINYA
US9 patents
⚠️ This page may combine multiple inventors who share the name “POLEPEDDI TAARINYA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
7 patentsUS9619408B2Apr 11, 2017
Memory channel that supports near memory and far memory access
INTEL CORP30 citations97
US10282323B2May 7, 2019
Memory channel that supports near memory and far memory access
INTEL CORP14 citations94
US10241943B2Mar 26, 2019
Memory channel that supports near memory and far memory access
INTEL CORP19 citations94
US10282322B2May 7, 2019
Memory channel that supports near memory and far memory access
INTEL CORP14 citations91
US10719443B2Jul 21, 2020
Apparatus and method for implementing a multi-level memory hierarchy
INTEL CORP2 citations73
US10691626B2Jun 23, 2020
Memory channel that supports near memory and far memory access
INTEL CORP2 citations73
US10241912B2Mar 26, 2019
Apparatus and method for implementing a multi-level memory hierarchy
INTEL CORP2 citations73