P

Inventor

ACAR EMRAH

US38 patents
⚠️ This page may combine multiple inventors who share the name “ACAR EMRAH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

23 patents
US6842714B1Jan 11, 2005

Method for determining the leakage power for an integrated circuit

IBM82 citations98
US7137080B2Nov 14, 2006

Method for determining and using leakage current sensitivities to optimize the design of an integrated circuit

IBM42 citations92
US6769100B2Jul 27, 2004

Method and system for power node current waveform modeling

IBM24 citations92
US9606934B2Mar 28, 2017

Matrix ordering for cache efficiency in performing large sparse matrix operations

IBM8 citations84
US7689942B2Mar 30, 2010

Simultaneous power and timing optimization in integrated circuits by performing discrete actions on circuit components

IBM8 citations76
US10373057B2Aug 6, 2019

Concept analysis operations utilizing accelerators

IBM4 citations73
US10139446B2Nov 27, 2018

Massive multi-dimensionality failure analytics with smart converged bounds

IBM2 citations73
US9928327B2Mar 27, 2018

Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture

IBM2 citations73
US10387596B2Aug 20, 2019

Multi-dimension variable predictive modeling for yield analysis acceleration

IBM4 citations72
US11327825B2May 10, 2022

Predictive analytics for failure detection

IBM2 citations71
US7191113B2Mar 13, 2007

Method and system for short-circuit current modeling in CMOS integrated circuits

IBM9 citations71
US10474774B2Nov 12, 2019

Power and performance sorting of microprocessors from first interconnect layer to wafer final test

IBM2 citations70
US7441213B2Oct 21, 2008

Method for testing the validity of initial-condition statements in circuit simulation, and correcting inconsistencies thereof

IBM7 citations70
US10963794B2Mar 30, 2021

Concept analysis operations utilizing accelerators

IBM0 citations62
US10310812B2Jun 4, 2019

Matrix ordering for cache efficiency in performing large sparse matrix operations

IBM1 citations62
US11340977B2May 24, 2022

Predictive analytics for failure detection

IBM0 citations61
US10169509B2Jan 1, 2019

Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture

IBM0 citations52
US10169508B2Jan 1, 2019

Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture

IBM0 citations52
US9928326B2Mar 27, 2018

Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture

IBM0 citations52
US9613172B2Apr 4, 2017

Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture

IBM0 citations52
US9600615B2Mar 21, 2017

Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture

IBM0 citations52
US9256704B2Feb 9, 2016

Efficient deployment of table lookup (TLU) in an enterprise-level scalable circuit simulation architecture

IBM0 citations52
US7519526B2Apr 14, 2009

Charge-based circuit analysis

IBM0 citations50

ACAR EMRAH

10 patents

ANSYS INC

5 patents