Inventor

SANKARAN RAJESH

US42 patents

Patents

42 patents

US10228981B2Mar 12, 2019

Method, apparatus, system for optimized work submission to an accelerator work queue

INTEL CORP4 citations73

US11392506B2Jul 19, 2022

Apparatus and method for secure memory access using trust domains

INTEL CORP3 citations72

US11526290B2Dec 13, 2022

System and method to track physical address accesses by a CPU or device

INTEL CORP5 citations71

US11201838B2Dec 14, 2021

System, apparatus and method for increasing efficiency of link communications

INTEL CORP6 citations71

US12379956B2Aug 5, 2025

Processor interrupt expansion feature

INTEL CORP1 citations64

US12430162B2Sep 30, 2025

User-level interprocessor interrupts

INTEL CORP0 citations62

US12271616B2Apr 8, 2025

Independently controlled DMA and CPU access to a shared memory region

INTEL CORP0 citations62

US12248800B2Mar 11, 2025

Virtualization of interprocessor interrupts

INTEL CORP0 citations62

US12229581B2Feb 18, 2025

Virtualization and multi-tenancy support in graphics processors

INTEL CORP0 citations62

US12164971B2Dec 10, 2024

High-performance input-output devices supporting scalable virtualization

INTEL CORP0 citations62

US12099841B2Sep 24, 2024

User timer directly programmed by application

INTEL CORP0 citations62

US12086082B2Sep 10, 2024

PASID based routing extension for scalable IOV systems

INTEL CORP0 citations62

US11900114B2Feb 13, 2024

Systems and methods to skip inconsequential matrix operations

INTEL CORP0 citations62

US11740931B2Aug 29, 2023

Processing device, control unit, electronic device, method for the electronic device, and computer program for the electronic device

INTEL CORP0 citations62

US11513957B2Nov 29, 2022

Processor and method implementing a cacheline demote machine instruction

INTEL CORP0 citations62

US11461099B2Oct 4, 2022

System, apparatus and method for fine-grain address space selection in a processor

INTEL CORP0 citations62

US11269782B2Mar 8, 2022

Address space identifier management in complex input/output virtualization environments

INTEL CORP0 citations62

US11055147B2Jul 6, 2021

High-performance input-output devices supporting scalable virtualization

INTEL CORP0 citations62

US11016894B2May 25, 2021

Techniques to provide cache coherency based on cache type

INTEL CORP0 citations62

US12229069B2Feb 18, 2025

Accelerator controller hub

INTEL CORP0 citations61

US11921646B2Mar 5, 2024

Secure address translation services using a permission table

INTEL CORP0 citations61

US11392511B2Jul 19, 2022

Secure address translation services using a permission table

INTEL CORP0 citations61

US11169929B2Nov 9, 2021

Pause communication from I/O devices supporting page faults

INTEL CORP0 citations60

US12443477B2Oct 14, 2025

Method and apparatus for high-performance page-fault handling for multi-tenant scalable accelerators

INTEL CORP0 citations59

US10817425B2Oct 27, 2020

Hardware/software co-optimization to improve performance and energy for inter-VM communication for NFVs and other producer-consumer workloads

INTEL CORP0 citations52

US12292840B2May 6, 2025

Secure direct peer-to-peer memory access requests between devices

INTEL CORP0 citations51

US12164444B2Dec 10, 2024

Device, method, and system to identify a page request to be processed after a reset event

INTEL CORP0 citations51

US12045640B2Jul 23, 2024

System, apparatus and method for accessing multiple address spaces via a data mover

INTEL CORP0 citations51

US11907744B2Feb 20, 2024

System, apparatus and method for enabling fine-grain quality of service or rate control for work submissions

INTEL CORP0 citations51

US11599621B2Mar 7, 2023

Apparatuses, methods, and systems for verification of input-output memory management unit to device attachment

INTEL CORP0 citations51

US11228539B2Jan 18, 2022

Technologies for managing disaggregated accelerator networks based on remote direct memory access

INTEL CORP0 citations51

US11379236B2Jul 5, 2022

Coherency tracking apparatus and method for an attached coprocessor or accelerator

INTEL CORP0 citations50

US10108556B2Oct 23, 2018

Updating persistent data in persistent memory-based storage

INTEL CORP0 citations50

US11080088B2Aug 3, 2021

Posted interrupt processing in virtual machine monitor

INTEL CORP0 citations44

US10579382B2Mar 3, 2020

Method and apparatus for a scalable interrupt infrastructure

INTEL CORP0 citations41

SANKARAN RAJESH

Patents

High-performance input-output devices supporting scalable virtualization

Apparatus and method for secure memory access using trust domains

Updating persistent data in persistent memory-based storage

Shared accelerator memory systems and methods

Virtualization and multi-tenancy support in graphics processors

High-performance input-output devices supporting scalable virtualization

Systems and methods to skip inconsequential matrix operations

Method, apparatus, system for optimized work submission to an accelerator work queue

Apparatus and method for secure memory access using trust domains

System and method to track physical address accesses by a CPU or device

System, apparatus and method for increasing efficiency of link communications

Processor interrupt expansion feature

User-level interprocessor interrupts

Independently controlled DMA and CPU access to a shared memory region

Virtualization of interprocessor interrupts

Virtualization and multi-tenancy support in graphics processors

High-performance input-output devices supporting scalable virtualization

User timer directly programmed by application

PASID based routing extension for scalable IOV systems

Systems and methods to skip inconsequential matrix operations

Processing device, control unit, electronic device, method for the electronic device, and computer program for the electronic device

Processor and method implementing a cacheline demote machine instruction

System, apparatus and method for fine-grain address space selection in a processor

Address space identifier management in complex input/output virtualization environments

High-performance input-output devices supporting scalable virtualization

Techniques to provide cache coherency based on cache type

Accelerator controller hub

Secure address translation services using a permission table

Secure address translation services using a permission table

Pause communication from I/O devices supporting page faults

Method and apparatus for high-performance page-fault handling for multi-tenant scalable accelerators

Hardware/software co-optimization to improve performance and energy for inter-VM communication for NFVs and other producer-consumer workloads

Secure direct peer-to-peer memory access requests between devices

Device, method, and system to identify a page request to be processed after a reset event

System, apparatus and method for accessing multiple address spaces via a data mover

System, apparatus and method for enabling fine-grain quality of service or rate control for work submissions

Apparatuses, methods, and systems for verification of input-output memory management unit to device attachment

Technologies for managing disaggregated accelerator networks based on remote direct memory access

Coherency tracking apparatus and method for an attached coprocessor or accelerator

Updating persistent data in persistent memory-based storage

Posted interrupt processing in virtual machine monitor

Method and apparatus for a scalable interrupt infrastructure