Inventor

JEZEWSKI CHRISTOPHER J

US53 patents

⚠️ This page may combine multiple inventors who share the name “JEZEWSKI CHRISTOPHER J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JEZEWSKI CHRISTOPHER J

INTEL CORP

Cobalt based interconnects and methods of fabrication thereof

Self-aligned hard masks with converted liners

Techniques for forming interconnects in porous dielectric materials

Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenches

Metallic sealants in transistor arrangements

Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenches

Seam healing of metal interconnects

Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenches

Methods for forming interconnect layers having tight pitch interconnect structures

Quantum key distribution (QSD) scheme using photonic integrated circuit (PIC)

Cobalt based interconnects and methods of fabrication thereof

Techniques for enhancing fracture resistance of interconnects

Integrated circuits with line breaks and line bridges within a single interconnect level

Integrated circuits (IC&#39;s) with electro-migration (EM)—resistant segments in an interconnect level

Integrated circuits with line breaks and line bridges within a single interconnect level

Common plate capacitor array connections, and processes of making same

Metallic sealants in transistor arrangements

Isolation wall stressor structures to improve channel stress and their methods of fabrication

Metallization structures for stacked device connectivity and their methods of fabrication

Metallization structures for stacked device connectivity and their methods of fabrication

Isolation wall stressor structures to improve channel stress and their methods of fabrication

Cobalt based interconnects and methods of fabrication thereof

Use of noble metals in the formation of conductive connectors

Dual contact process with stacked metal layers

Magnetic memory device with ruthenium diffusion barrier

Retention improvement by high-k encapsulation of RRAM devices

Contact stacks to reduce hydrogen in thin film transistor

Methods of forming substrate interconnect structures for enhanced thin seed conduction

Seam healing of metal interconnects

Vertical meander inductor for small core voltage regulators

Techniques for forming interconnects in porous dielectric materials

Interconnects with fully clad lines

Low resistance and reduced reactivity approaches for fabricating contacts and the resulting structures

Metallization stacks with self-aligned staggered metal lines

Forming barrier walls, capping, or alloys /compounds within metal lines

JEZEWSKI CHRISTOPHER J

Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenches

Cobalt based interconnects and methods of fabrication thereof

Vertical meander inductor for small core voltage regulators

Vertical meander inductor for small core voltage regulators

Vertical meander inductor for small core voltage regulators

TAHOE RES LTD

Cobalt based interconnects and methods of fabrication thereof

Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenches

Cobalt based interconnects and methods of fabrication thereof

PILLARISETTY RAVI

Passivation layer for flexible display

Wearable imaging sensor for communications

GRAND HAVEN STAMPED PROD

Shifter with automatic and manual shift modes and with shift position indicators

AKOLKAR ROHAN N

Barrier layers

STEIGERWALD JOSEPH M

Methods to form memory devices having a capacitor with a recessed electrode

EATON INTELLIGENT POWER LTD

Self-locking nut and screw assembly

KUHN KELIN J

Shut-off mechanism in an integrated circuit device

Integrated circuits (IC's) with electro-migration (EM)—resistant segments in an interconnect level