Inventor

REED PAUL A

US20 patents

⚠️ This page may combine multiple inventors who share the name “REED PAUL A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

REED PAUL A

MOTOROLA INC

Memory architecture with sub-arrays

Diagnostic mode for a cache

Memory system for reliably writing addresses with reduced power consumption

Bit line precharge on a column address change

Summation of address transition signals

Method and apparatus for performing different cache replacement algorithms for flush and non-flush operations in response to a cache flush control bit register

Memory cache with low power consumption and method of operation

Memory and associated method including an operating mode for simultaneously selecting multiple rows of cells

Data processor with alocate bit and method of operation

High performance output driver

Chip select speed-up circuit for a memory

Asynchronous row and column control

Latching sense amplifier

TEXAS INSTRUMENTS INC

Virtual ground MOS EPROM or ROM matrix

Column and ground select sequence in electrically programmable memory

Programming sequence for electrically programmable memory

Power down sequence for electrically programmable memory

Predecode and multiplex in addressing electrically programmable memory

REED PAUL A

Method for incorporating existing silicon die into 3D integrated stack

HOWARD EDWARD G

System and method for managing uncertain events for communication devices