Inventor

PURCELL STEPHEN C

US53 patents

⚠️ This page may combine multiple inventors who share the name “PURCELL STEPHEN C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PURCELL STEPHEN C

ATI INT SRL

Modifying program execution based on profiling

Profiling execution of computer programs

Profiling execution of a sequence of events occuring during a profiled execution interval that matches time-independent selection criteria of events to be profiled

Method and apparatus for busing data elements

Variable-length code decoder

Method and apparatus for interfacing a processor with a bus

Partitioned adder tree supported by a multiplexer configuration

Circuit and method for wrap-around sign extension for signed numbers

Sign extension circuit and method for unsigned multiplication and accumulation

Encryption/decryption instruction set enhancement

Method of manufacture and apparatus of an integrated computing system

Circuit and method for fast squaring

Circuit and method for wrap-around sign extension for signed numbers using replacement of most significant bit

Method and apparatus for transposing bits

Modified adder tree structure and method using logic and gates to generate carry-in values

Variable-length code decoder

Circuit and method for partial product bit shifting

C CUBE MICROSYSTEMS

System for providing antialiased video overlays

Decompression processor for video applications

Structure and method for motion estimation of a digital image by matching derived scores

2-dimensional memory allowing access both as rows of data words and columns of data words

Motion vector encoding circuit and method thereof

Structure and method for a multistandard video encoder/decoder

Decompression processor for video applications

System for compression and decompression of video data using discrete cosine transform and coding techniques

Non-linear digital filters for interlaced video signals and method thereof

Adaptic threshold filter and method thereof

Method and apparatus for mapping data of a 2-dimensional space from a linearly addressed memory system

MPEG video decompression processor

Decoder for compressed video signals

Decompression processor for video applications

Non-linear digital filters for interlaced video signals and method thereof

CHROMATIC RES INC

Structure and method for signed multiplication using large multiplier having two embedded signed multipliers

Variable length instructions packed in a fixed length double instruction

Structure and method for embedding two small multipliers in a larger multiplier

Structure and method for shifting and reordering a plurality of data bytes

M/A for optimizing retry time upon cache-miss by selecting a delay time according to whether the addressed location&#39;s dirty bit indicates a write-back

Multimedia processor using variable length instructions with opcode specification of source operand as result of prior instruction

Structure and method of using an arithmetic and logic unit for carry propagation stage of a multiplier

Method and structure for performing motion estimation using reduced precision pixel intensity values

Programmable logic unit for arithmetic, logic and equality functions

Adder circuit incorporating byte boundaries

ADVANCED MICRO DEVICES INC

Method and apparatus for dynamic allocation of processing resources

Method and apparatus for dynamic allocation of processing resources

YATES JR JOHN S

Detecting conditions for transfer of execution from one computer instruction stream to another and executing transfer on satisfaction of the conditions

PURCELL STEPHEN C

Method and system to implement an improved floating point adder with integrated adding and rounding

(unassigned)

Method and apparatus of configurable processing

BROADBAND ROYALTY CORP

Method and system for accelerating ethernet checksums

FOGG CHAD E

Variable-length code decoder

VAN DYKE KORBIN

Method and apparatus for dynamic allocation of processing resources

M/A for optimizing retry time upon cache-miss by selecting a delay time according to whether the addressed location's dirty bit indicates a write-back