Inventor

FOOTE DAVID K

US40 patents

⚠️ This page may combine multiple inventors who share the name “FOOTE DAVID K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FOOTE DAVID K

ADVANCED MICRO DEVICES INC

Process for fabricating an ONO structure having a silicon-rich silicon nitride layer

Dual layer bottom anti-reflective coating

Silicon oxime film

Process for fabricating an ONO structure

Semiconductor device including antireflective etch stop layer

Method of fabricating an ONO dielectric by nitridation for MNOS memory cells

Process for forming anti-reflective film for semiconductor fabrication using extremely short wavelength deep ultraviolet photolithography

Local interconnects for improved alignment tolerance and size reduction

Bit-line oxidation by removing ONO oxide prior to bit-line implant

Process for fabricating a non-volatile memory device

Process for fabricating high density memory cells using a polysilicon hard mask

Process for optimizing pocket implant profile by RTA implant annealing for a non-volatile semiconductor device

Process for fabricating high density memory cells using a metallic hard mask

Process for fabricating a semiconductor device using a silicon-rich silicon nitride ARC

Process for fabricating semiconductor device including antireflective etch stop layer

Process for forming a bit-line in a MONOS device

Process for fabricating a bit-line in a monos device using a dual layer hard mask

Multipurpose cap layer dielectric

Methods for making a semiconductor device with improved hot carrier lifetime

Silicon oxime spacer for preventing over-etching during local interconnect formation

Process for fabricating semiconductor memory device with high data retention including silicon oxynitride etch stop layer formed at high temperature with low hydrogen ion concentration

Gate pattern formation using a bottom anti-reflective coating

Process for forming bottom anti-reflection coating for semiconductor fabrication photolithography which inhibits photoresist footing

Methods and arrangements for insulating local interconnects for improved alignment tolerance and size reduction

Process for fabricating a bit-line using buried diffusion isolation

Methods and arrangements for improved spacer formation within a semiconductor device

Methods for preventing deleterious punch-through during local interconnect formation

Process for fabricating a semiconductor device having a graded junction

Deposition control of stop layer and dielectric layer for use in the formation of local interconnects

Process for fabricating an EEPROM device having a pocket substrate region

Method of using source/drain nitride for periphery field oxide and bit-line oxide

Integration of an ion implant hard mask structure into a process for fabricating high density memory cells

Semiconductor device having uniform spacers

Method for silicon surface control for shallow junction formation

KEWAUNEE SCIENT CORP

Laboratory countertop

Apparatus for molding thin resin sheets

FOOTE DAVID K

Methods of fabricating electronics assemblies

Apparatus and methods for supporting workpieces during plasma processing

FAZIO JAMES P

Apparatus and methods for handling workpieces of different sizes

NORDSON CORP

Apparatus and method for intraluminal polymer deposition