P

Inventor

BABCOCK JEFFREY A

DE46 patents
⚠️ This page may combine multiple inventors who share the name “BABCOCK JEFFREY A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TEXAS INSTRUMENTS INC

31 patents
US7883977B2Feb 8, 2011

Advanced CMOS using super steep retrograde wells

TEXAS INSTRUMENTS INC124 citations99
US7655523B2Feb 2, 2010

Advanced CMOS using super steep retrograde wells

TEXAS INSTRUMENTS INC124 citations99
US7501324B2Mar 10, 2009

Advanced CMOS using super steep retrograde wells

TEXAS INSTRUMENTS INC121 citations99
US7199430B2Apr 3, 2007

Advanced CMOS using super steep retrograde wells

TEXAS INSTRUMENTS INC138 citations99
US7064399B2Jun 20, 2006

Advanced CMOS using super steep retrograde wells

TEXAS INSTRUMENTS INC148 citations99
US6407425B1Jun 18, 2002

Programmable neuron MOSFET on SOI

TEXAS INSTRUMENTS INC87 citations98
US6391707B1May 21, 2002

Method of manufacturing a zero mask high density metal/insulator/metal capacitor

TEXAS INSTRUMENTS INC62 citations96
US6465830B2Oct 15, 2002

RF voltage controlled capacitor on thick-film SOI

TEXAS INSTRUMENTS INC20 citations93
US6958523B2Oct 25, 2005

On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and electrically programmable fuses for integrated circuits

TEXAS INSTRUMENTS INC38 citations92
US6838348B2Jan 4, 2005

Integrated process for high voltage and high performance silicon-on-insulator bipolar devices

TEXAS INSTRUMENTS INC18 citations92
US6770952B2Aug 3, 2004

Integrated process for high voltage and high performance silicon-on-insulator bipolar devices

TEXAS INSTRUMENTS INC29 citations92
US6660616B2Dec 9, 2003

P-i-n transit time silicon-on-insulator device

TEXAS INSTRUMENTS INC32 citations92
US6646323B2Nov 11, 2003

Zero mask high density metal/insulator/metal capacitor

TEXAS INSTRUMENTS INC45 citations92
US10269895B2Apr 23, 2019

Method for creating the high voltage complementary BJT with lateral collector on bulk substrate with resurf effect

TEXAS INSTRUMENTS INC7 citations84
US9741790B2Aug 22, 2017

Method for creating the high voltage complementary BJT with lateral collector on bulk substrate with resurf effect

TEXAS INSTRUMENTS INC5 citations84
US9633995B2Apr 25, 2017

Method of forming a gate shield in an ED-CMOS transistor and a base of a bipolar transistor using BICMOS technologies

TEXAS INSTRUMENTS INC7 citations84
US9633994B2Apr 25, 2017

BICMOS device having commonly defined gate shield in an ED-CMOS transistor and base in a bipolar transistor

TEXAS INSTRUMENTS INC11 citations84
US9306013B2Apr 5, 2016

Method of forming a gate shield in an ED-CMOS transistor and a base of a bipolar transistor using BICMOS technologies

TEXAS INSTRUMENTS INC6 citations84
US7422972B2Sep 9, 2008

On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and electrically programmable fuses for integrated circuits

TEXAS INSTRUMENTS INC13 citations84
US6794237B2Sep 21, 2004

Lateral heterojunction bipolar transistor

TEXAS INSTRUMENTS INC13 citations84
US11024649B2Jun 1, 2021

Integrated circuit with resurf region biasing under buried insulator layers

TEXAS INSTRUMENTS INC0 citations62
US7217322B2May 15, 2007

Method of fabricating an epitaxial silicon-germanium layer and an integrated semiconductor device comprising an epitaxial arsenic in-situ doped silicon-germanium layer

TEXAS INSTRUMENTS INC5 citations62
US7164186B2Jan 16, 2007

Structure of semiconductor device with sinker contact region

TEXAS INSTRUMENTS INC3 citations62
US6806159B2Oct 19, 2004

Method for manufacturing a semiconductor device with sinker contact region

TEXAS INSTRUMENTS INC6 citations62
US6774455B2Aug 10, 2004

Semiconductor device with a collector contact in a depressed well-region

TEXAS INSTRUMENTS INC2 citations62
US10636815B2Apr 28, 2020

Integrated circuit with resurf region biasing under buried insulator layers

TEXAS INSTRUMENTS INC0 citations52
US10504921B2Dec 10, 2019

Integrated circuit with resurf region biasing under buried insulator layers

TEXAS INSTRUMENTS INC0 citations52
US9640611B2May 2, 2017

HV complementary bipolar transistors with lateral collectors on SOI with resurf regions under buried oxide

TEXAS INSTRUMENTS INC0 citations52
US9343459B2May 17, 2016

Method for creating the high voltage complementary BJT with lateral collector on bulk substrate with resurf effect

TEXAS INSTRUMENTS INC0 citations52
US6927428B2Aug 9, 2005

Lateral heterojunction bipolar transistor

TEXAS INSTRUMENTS INC1 citations52
US12389642B2Aug 12, 2025

Semiconductor devices for high frequency applications

TEXAS INSTRUMENTS INC0 citations41

BABCOCK JEFFREY A

10 patents

NAT SEMICONDUCTOR CORP

3 patents

SHAFI ZIA ALAN

2 patents