Inventor
TRIVEDI RITESH
US7 patents
Patents
7 patentsUS6535423B2Mar 18, 2003
Drain bias for non-volatile memory
INTEL CORP138 citations98
US6434049B1Aug 13, 2002
Sample and hold voltage reference source
INTEL CORP24 citations92
US6442069B1Aug 27, 2002
Differential signal path for high speed data transmission in flash memory
INTEL CORP9 citations72
US6456540B1Sep 24, 2002
Method and apparatus for gating a global column select line with address transition detection
INTEL CORP11 citations71
US6570789B2May 27, 2003
Load for non-volatile memory drain bias
INTEL CORP3 citations62
US6477086B2Nov 5, 2002
Local sensing of non-volatile memory
INTEL CORP2 citations62
US6744671B2Jun 1, 2004
Kicker for non-volatile memory drain bias
INTEL CORP4 citations58