Inventor
FARKAS JANOS
FR44 patents
⚠️ This page may combine multiple inventors who share the name “FARKAS JANOS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MOTOROLA INC
14 patentsUS6037668AMar 14, 2000
Integrated circuit having a support structure
MOTOROLA INC136 citations98
US6001730ADec 14, 1999
Chemical mechanical polishing (CMP) slurry for polishing copper interconnects which use tantalum-based barrier layers
MOTOROLA INC324 citations98
US5773364AJun 30, 1998
Method for using ammonium salt slurries for chemical mechanical polishing (CMP)
MOTOROLA INC120 citations97
US6444569B2Sep 3, 2002
Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) process
MOTOROLA INC60 citations95
US6313024B1Nov 6, 2001
Method for forming a semiconductor device
MOTOROLA INC81 citations95
US6274478B1Aug 14, 2001
Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) process
MOTOROLA INC70 citations95
US5897375AApr 27, 1999
Chemical mechanical polishing (CMP) slurry for copper and method of use in integrated circuit manufacture
MOTOROLA INC338 citations95
US5863838AJan 26, 1999
Method for chemically-mechanically polishing a metal layer
MOTOROLA INC62 citations95
US6096652AAug 1, 2000
Method of chemical mechanical planarization using copper coordinating ligands
MOTOROLA INC69 citations94
US5935871AAug 10, 1999
Process for forming a semiconductor device
MOTOROLA INC47 citations92
US6573173B2Jun 3, 2003
Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) process
MOTOROLA INC23 citations91
US6204169B1Mar 20, 2001
Processing for polishing dissimilar conductive layers in a semiconductor device
MOTOROLA INC42 citations91
US5710069AJan 20, 1998
Measuring slurry particle size during substrate polishing
MOTOROLA INC61 citations91
US5928962AJul 27, 1999
Process for forming a semiconductor device
MOTOROLA INC12 citations72
FARKAS JANOS
9 patentsUS8174992B2May 8, 2012
Fault localisation in multiple spanning tree based architectures
FARKAS JANOS15 citations84
US8411688B2Apr 2, 2013
Method and apparatus for ethernet protection with local re-routing
FARKAS JANOS13 citations83
US8155030B2Apr 10, 2012
Method and apparatus for network tree management
FARKAS JANOS7 citations83
US8606961B2Dec 10, 2013
Method and apparatus for link-state handshake for loop prevention
FARKAS JANOS4 citations62
US8483097B2Jul 9, 2013
Method of generating spanning trees to handle link and node failures in a network
FARKAS JANOS2 citations62
US8752228B2Jun 17, 2014
Apparatus for cleaning of circuit substrates
FARKAS JANOS3 citations57
US8576689B2Nov 5, 2013
Method and arrangement for failure handling in a network
FARKAS JANOS0 citations51
US8467317B2Jun 18, 2013
Method and apparatus for network tree management
FARKAS JANOS0 citations51
US8263430B2Sep 11, 2012
Capping layer formation onto a dual damescene interconnect
FARKAS JANOS0 citations39
ERICSSON TELEFON AB L M
6 patentsUS7965621B2Jun 21, 2011
Method and arrangement for failure handling in a network
ERICSSON TELEFON AB L M7 citations84
US7804791B2Sep 28, 2010
Method of generating spanning trees to handle link and node failures in a network
ERICSSON TELEFON AB L M6 citations66
US11949599B2Apr 2, 2024
Method and system of implementing conversation-sensitive collection for a link aggregation group
ERICSSON TELEFON AB L M0 citations63
US11038804B2Jun 15, 2021
Method and system of implementing conversation-sensitive collection for a link aggregation group
ERICSSON TELEFON AB L M0 citations63
US8014320B2Sep 6, 2011
Method for discovering the physical topology of a telecommunications network
ERICSSON TELEFON AB L M5 citations53
US7660242B2Feb 9, 2010
Call admission control system and method for interpreting signaling messages and controlling traffic load in internet protocol differentiated services networks
ERICSSON TELEFON AB L M1 citations46
FREESCALE SEMICONDUCTOR INC
6 patentsUS6815820B2Nov 9, 2004
Method for forming a semiconductor interconnect with multiple thickness
FREESCALE SEMICONDUCTOR INC14 citations83
US7883393B2Feb 8, 2011
System and method for removing particles from a polishing pad
FREESCALE SEMICONDUCTOR INC7 citations79
US7939482B2May 10, 2011
Cleaning solution for a semiconductor wafer
FREESCALE SEMICONDUCTOR INC2 citations63
US7176574B2Feb 13, 2007
Semiconductor device having a multiple thickness interconnect
FREESCALE SEMICONDUCTOR INC3 citations62
US7674725B2Mar 9, 2010
Treatment solution and method of applying a passivating layer
FREESCALE SEMICONDUCTOR INC0 citations50
US7803719B2Sep 28, 2010
Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereof, and passivating coupling material comprising multiple organic components for use in a semiconductor device
FREESCALE SEMICONDUCTOR INC0 citations37
NXP BV
2 patentsUS7691756B2Apr 6, 2010
Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereof, and material for coupling a dielectric layer and a metal layer in a semiconductor device
NXP BV10 citations82
US7951729B2May 31, 2011
Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereor, and material for coupling a dielectric layer and a metal layer in a semiconductor device
NXP BV0 citations51