Inventor
MIN KYU S
US19 patents
⚠️ This page may combine multiple inventors who share the name “MIN KYU S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
6 patentsUS7223701B2May 29, 2007
In-situ sequential high density plasma deposition and etch processing for gap fill
INTEL CORP83 citations96
US7763511B2Jul 27, 2010
Dielectric barrier for nanocrystals
INTEL CORP5 citations63
US7795607B2Sep 14, 2010
Current focusing memory architecture for use in electrical probe-based memory storage
INTEL CORP6 citations61
US9059301B2Jun 16, 2015
Self-aligned charge-trapping layers for non-volatile data storage, processes of forming same, and devices containing same
INTEL CORP0 citations51
US7750433B2Jul 6, 2010
Probe-based memory
INTEL CORP0 citations51
US7498655B2Mar 3, 2009
Probe-based memory
INTEL CORP0 citations51
MICRON TECHNOLOGY INC
5 patentsUS7968406B2Jun 28, 2011
Memory cells, methods of forming dielectric materials, and methods of forming memory cells
MICRON TECHNOLOGY INC23 citations92
US7898850B2Mar 1, 2011
Memory cells, electronic systems, methods of forming memory cells, and methods of programming memory cells
MICRON TECHNOLOGY INC23 citations92
US11257838B2Feb 22, 2022
Thickened sidewall dielectric for memory cell
MICRON TECHNOLOGY INC0 citations62
US10608005B2Mar 31, 2020
Thickened sidewall dielectric for memory cell
MICRON TECHNOLOGY INC0 citations52
US8900946B2Dec 2, 2014
Method of forming layers using atomic layer deposition
MICRON TECHNOLOGY INC0 citations52
MIN KYU S
4 patentsUS8228743B2Jul 24, 2012
Memory cells containing charge-trapping zones
MIN KYU S45 citations96
US8546944B2Oct 1, 2013
Multilayer dielectric memory device
MIN KYU S6 citations82
US8748264B2Jun 10, 2014
Self-aligned charge-trapping layers for non-volatile data storage, processes of forming same, and devices containing same
MIN KYU S2 citations61
US8729704B2May 20, 2014
Multilayer dielectric memory device
MIN KYU S1 citations51