Inventor

MARTONOSI MARGARET

US8 patents

⚠️ This page may combine multiple inventors who share the name “MARTONOSI MARGARET”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

UNIV PRINCETON

3 patents

US6745336B1Jun 1, 2004

System and method of operand value based processor optimization by detecting a condition of pre-determined number of bits and selectively disabling pre-determined bit-fields by clock gating

UNIV PRINCETON80 citations97

US6324673B1Nov 27, 2001

Method and apparatus for edge-endpoint-based VLSI design rule checking

UNIV PRINCETON76 citations95

US9524232B2Dec 20, 2016

Inter-core cooperative TLB prefetchers

UNIV PRINCETON2 citations58

NEC USA INC

3 patents

US6038392AMar 14, 2000

Implementation of boolean satisfiability with non-chronological backtracking in reconfigurable hardware

NEC USA INC79 citations95

US6415430B1Jul 2, 2002

Method and apparatus for SAT solver architecture with very low synthesis and layout overhead

NEC USA INC42 citations91

US6247164B1Jun 12, 2001

Configurable hardware system implementing Boolean Satisfiability and method thereof

NEC USA INC39 citations91

BHATTACHARJEE ABHISHEK

1 patent

US8880844B1Nov 4, 2014

Inter-core cooperative TLB prefetchers

BHATTACHARJEE ABHISHEK17 citations84

AGERE SYSTEMS INC

1 patent

US7472302B2Dec 30, 2008

Method and apparatus for reducing leakage power in a cache memory using adaptive time-based decay

AGERE SYSTEMS INC12 citations83