Inventor

DUNGA MOHAN

US42 patents

⚠️ This page may combine multiple inventors who share the name “DUNGA MOHAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DUNGA MOHAN

SANDISK TECHNOLOGIES LLC

Metal contact via structure surrounded by an air gap and method of making thereof

Multiple liner interconnects for three dimensional memory devices and method of making thereof

Multi-tier three-dimensional memory devices including vertically shared source lines and method of making thereof

Apparatus and method for preconditioning currents to reduce errors in sensing for non-volatile memory

Cell current based bit line voltage

System solution for first read issue using time dependent read voltages

Wordline smart tracking verify

Non-volatile memory with multiple wells for word line switch transistors

Erase speed based word line control

Concurrent multi-state program verify for non-volatile memory

Programming to minimize cross-temperature threshold voltage widening

System and method for programming non-volatile memory during burst sequential write

System and method for in-situ programming and read operation adjustments in a non-volatile memory

Erase for partially programmed blocks in non-volatile memory

Non-volatile memory with capacitors using metal under signal line or above a device capacitor

Non-volatile memory with capacitors using metal under pads

Non-volatile memory with pool capacitor

Non-volatile memory with pool capacitor

Three-dimensional memory device containing multiple size drain contact via structures and method of making same

Temperature based programming in memory

Systems and methods for high-performance write operations

Non-volatile memory with capacitors using metal under signal line or above a device capacitor

Non-volatile memory with capacitors using metal under signal line or above a device capacitor

Systems and methods for high-performance write operations

SANDISK TECHNOLOGIES INC

Word line dependent temperature compensation scheme during sensing to counteract cross-temperature effect

Compensation for temperature dependence of bit line resistance

Pre-charge during programming for 3D memory using gate-induced drain leakage

Method and apparatus for program and erase of select gate transistors

Pre-charge during programming for 3D memory using gate-induced drain leakage

Smart verify for programming non-volatile memory

Method and apparatus for program and erase of select gate transistors

Controlling dummy word line bias during erase in non-volatile memory

Single-level cell endurance improvement with pre-defined blocks

Method of forming PN floating gate non-volatile storage elements and transistor having N+ gate

Non-volatile storage systems and methods

Method and apparatus for program and erase of select gate transistors

Unselect word line switch bias scheme for non-volatile memory apparatus

WESTERN DIGITAL TECH INC

System and method for programming a memory device with multiple writes without an intervening erase

System handling for first read read disturb

System and method for string-based erase verify to create partial good blocks

WESTERN DIGITAL TECHNOLOGIES INC

Recovering data from a faulty memory block in a memory system

LEE SANGHYUN

P-/Metal floating gate non-volatile storage element