Inventor

CHAUHAN RAJAT

IN40 patents

⚠️ This page may combine multiple inventors who share the name “CHAUHAN RAJAT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHAUHAN RAJAT

TEXAS INSTRUMENTS INC

Power-on reset circuit

Buffer Circuit

Voltage monitor using a capacitive digital-to-analog converter

Threshold tracking power-on-reset circuit

Voltage threshold gap circuits with temperature trim

Supply voltage regulator

Methods and apparatus for a low standby current DC-DC power controller with improved transient response

Fail-safe I/O to achieve ultra low system power

Single inductor multiple output regulator

Voltage sensing circuit

Reducing coupling effect on reference voltages when output buffers implemented with low voltage transistors generate high voltage output signals

Accuracy trim architecture for high precision voltage reference

Buffer circuit

Scheme to guarantee clean reset output at supply power-up

Voltage monitor using a capacitive digital-to-analog converter

Low frequency oscillator with ultra-low short circuit current

Supply voltage regulator

Two-temperature trimming for a voltage reference with reduced quiescent current

Supply voltage regulator

Load current measurement

Trim/test interface for devices with low pin count or analog or no-connect pins

Trim/test interface for devices with low pin count or analog or no-connect pins

Ultra-low power bandgap reference using a clocked amplifier

Ultra-low power, high speed poly fuse eprom

Low noise high precision voltage reference

Load current measurement

Fail-safe input/output (IO) circuit

Scheme to reduce stress of input/ output (IO) driver

Temperature drift correction in a voltage reference

Floating pin detection

Glitch reduced compensated circuits and methods for using such

ST MICROELECTRONICS PVT LTD

Differential receiver

System and method for a whole-chip electrostatic discharge protection that is independent of relative supply rail voltages and supply sequencing

Configurable output buffer and method to provide differential drive

Output buffer circuit capable of synchronous and asynchronous data buffering using sensing circuit, and method and system of same

CMOS input buffer and a method for supporting multiple I/O standards

Voltage translator having minimized power dissipation

Input buffer and method of operating the same

Utilization of unused IO block for core logic functions

CHAUHAN RAJAT

Input-output (I/O) circuit supporting multiple I/O logic-level swings