Inventor
OGISHIMA ATSUSHI
JP19 patents
⚠️ This page may combine multiple inventors who share the name “OGISHIMA ATSUSHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
HITACHI LTD
16 patentsUS6762449B2Jul 13, 2004
Semiconductor integrated circuit device and the process of manufacturing the same having poly-silicon plug, wiring trenches and bit lines formed in the wiring trenches having a width finer than a predetermined size
HITACHI LTD77 citations98
US6503794B1Jan 7, 2003
Semiconductor integrated circuit device and method for manufacturing the same
HITACHI LTD96 citations97
US6743673B2Jun 1, 2004
Semiconductor integrated circuitry and method for manufacturing the circuitry
HITACHI LTD64 citations95
US5734188AMar 31, 1998
Semiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the same
HITACHI LTD73 citations95
US6734479B1May 11, 2004
Semiconductor integrated circuit device and the method of producing the same
HITACHI LTD25 citations92
US6573170B2Jun 3, 2003
Process for multilayer wiring connections and bonding pad adhesion to dielectric in a semiconductor integrated circuit device
HITACHI LTD35 citations92
US6287914B1Sep 11, 2001
Method of forming a MISFET device with a bit line completely surrounded by dielectric
HITACHI LTD26 citations92
US5917211AJun 29, 1999
Semiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the same
HITACHI LTD37 citations92
US5264712ANov 23, 1993
Semiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the same
HITACHI LTD27 citations92
US7026679B2Apr 11, 2006
Semiconductor integrated circuit device and the process of manufacturing the same having poly-silicon plug, wiring trenches and bit lines formed in the wiring trenches having a width finer than a predetermined size
HITACHI LTD6 citations74
US6867092B2Mar 15, 2005
Semiconductor integrated circuit device and the process of manufacturing the same for reducing the size of a memory cell by making the width of a bit line than a predetermined minimum size
HITACHI LTD11 citations74
US6204184B1Mar 20, 2001
Method of manufacturing semiconductor devices
HITACHI LTD12 citations74
US6720234B2Apr 13, 2004
Semiconductor integrated circuit device and method of manufacturing involving the scale-down width of shallow groove isolation using round processing
HITACHI LTD5 citations73
US6562695B1May 13, 2003
Semiconductor integrated circuit device and method of manufacturing involving the scale-down width of shallow groove isolation using round processing
HITACHI LTD12 citations73
US6498100B2Dec 24, 2002
Method of manufacturing semiconductor devices
HITACHI LTD0 citations52
US6380085B2Apr 30, 2002
Method of manufacturing semiconductor devices
HITACHI LTD0 citations52