Inventor
JERIER PATRICK
FR3 patents
Patents
3 patentsUS6162706ADec 19, 2000
Method of epitaxy on a silicon substrate comprising areas heavily doped with arsenic
ST MICROELECTRONICS SA6 citations70
US6776842B2Aug 17, 2004
Method of epitaxy on a silicon substrate comprising areas heavily doped with arsenic
ST MICROELECTRONICS SA4 citations59
US6294443B1Sep 25, 2001
Method of epitaxy on a silicon substrate comprising areas heavily doped with boron
ST MICROELECTRONICS SA0 citations48