Inventor
GILBERTSON ROGER L
US8 patents
Patents
8 patentsUS6381715B1Apr 30, 2002
System and method for performing parallel initialization and testing of multiple memory banks and interfaces in a shared memory module
UNISYS CORP83 citations97
US6356991B1Mar 12, 2002
Programmable address translation system
UNISYS CORP61 citations95
US5832304ANov 3, 1998
Memory queue with adjustable priority and conflict detection
UNISYS CORP64 citations94
US6594785B1Jul 15, 2003
System and method for fault handling and recovery in a multi-processing system having hardware resources shared between multiple partitions
UNISYS CORP146 citations93
US6182112B1Jan 30, 2001
Method of and apparatus for bandwidth control of transfers via a bi-directional interface
UNISYS CORP56 citations92
US6477620B1Nov 5, 2002
Cache-level return data by-pass system for a hierarchical memory
UNISYS CORP41 citations91
US6457101B1Sep 24, 2002
System and method for providing the speculative return of cached data within a hierarchical memory system
UNISYS CORP52 citations91
US6260099B1Jul 10, 2001
Multi-level priority control system and method for managing concurrently pending data transfer requests
UNISYS CORP33 citations91