Inventor
CHOI JIHWAN
US14 patents
⚠️ This page may combine multiple inventors who share the name “CHOI JIHWAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SPANSION LLC
7 patentsUS8035153B2Oct 11, 2011
Self-aligned patterning method by using non-conformal film and etch for flash memory and other semiconductor applications
SPANSION LLC9 citations83
US7732276B2Jun 8, 2010
Self-aligned patterning method by using non-conformal film and etch back for flash memory and other semiconductor applications
SPANSION LLC4 citations62
US7670959B2Mar 2, 2010
Memory device etch methods
SPANSION LLC3 citations62
US7943983B2May 17, 2011
HTO offset spacers and dip off process to define junction
SPANSION LLC3 citations58
US7935596B2May 3, 2011
HTO offset and BL trench process for memory device to improve device performance
SPANSION LLC0 citations51
US7867899B2Jan 11, 2011
Wordline resistance reduction method and structure in an integrated circuit memory device
SPANSION LLC1 citations51
US7785965B2Aug 31, 2010
Dual storage node memory devices and methods for fabricating the same
SPANSION LLC0 citations50