Inventor

WITEK RICHARD T

US31 patents

⚠️ This page may combine multiple inventors who share the name “WITEK RICHARD T”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WITEK RICHARD T

DIGITAL EQUIPMENT CORP

Branch prediction in high-performance processor

Ensuring data integrity by locked-load and conditional-store operations in a multiprocessor system

Prefetch instruction for improving performance in reduced instruction set processor

Virtual to physical address translation scheme with granularity hint for identifying subsequent pages to be accessed

Pipeline having an integral cache which processes cache misses and loads data in parallel

System and method for preserving instruction state-atomicity for translated program

Byte-compare operation for high-performance processor

In-register data manipulation for unaligned byte write using data shift in reduced instruction set processor

In-register data manipulation using data shift in reduced instruction set processor

Translation buffer for virtual machines with address space match

Method for synchronization of arithmetic exceptions in central processing units having pipelined execution units simultaneously executing instructions

Providing a data processor with a user-mode accessible mode of operations in which the processor performs processing operations without interruption

Apparatus and method for recovering from missing page faults in vector data processing operations

Pipeline utilizing an integral cache for transferring data to and from a register

Method and apparatus for eliminating branches using conditional move instructions

Byte-compare operation for high-performance processor

Apparatus and method for main memory unit protection using access and fault logic signals

Apparatus and method for synchronization of access to main memory signal groups in a multiprocessor data processing system

Apparatus and method for control of asynchronous program interrupt events in a data processing system

Load/store with write-intent for write-back caches

Apparatus and method for data induced condition signalling

Apparatus and method for generating external interface signals in a microprocessor

APPLE INC

Floating-point arithmetic operation range exception override circuit

System for scheduling threads for execution

Memory select register to simplify operand mapping in subroutines

System and method for implementing finite impulse response filter in an audio processor

ADVANCED MICRO DEVICES INC

Method and apparatus for lowering bus clock frequency in a complex integrated data processing system

Integrating display controller into low power processor

Integrated circuit with a hibernate mode and method therefor

COMPAQ COMPUTER CORP

Branch performance in high speed processor

ELWHA LLC

Non-contacting inductive interconnects