Inventor
DELPRAT DANIEL
FR25 patents
⚠️ This page may combine multiple inventors who share the name “DELPRAT DANIEL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SOITEC SILICON ON INSULATOR
16 patentsUS7405136B2Jul 29, 2008
Methods for manufacturing compound-material wafers and for recycling used donor substrates
SOITEC SILICON ON INSULATOR25 citations91
US9293473B2Mar 22, 2016
Method for manufacturing a semiconductor on insulator structure having low electrical losses
SOITEC SILICON ON INSULATOR8 citations84
US7645682B2Jan 12, 2010
Bonding interface quality by cold cleaning and hot bonding
SOITEC SILICON ON INSULATOR8 citations83
US8962450B2Feb 24, 2015
Method for manufacturing a semiconductor-on-insulator structure having low electrical losses
SOITEC SILICON ON INSULATOR5 citations82
US11637542B2Apr 25, 2023
Heterostructure and method of fabrication
SOITEC SILICON ON INSULATOR1 citations73
US10826459B2Nov 3, 2020
Heterostructure and method of fabrication
SOITEC SILICON ON INSULATOR2 citations73
US12101080B2Sep 24, 2024
Heterostructure and method of fabrication
SOITEC SILICON ON INSULATOR0 citations62
US11595020B2Feb 28, 2023
Heterostructure and method of fabrication
SOITEC SILICON ON INSULATOR0 citations62
US8790993B2Jul 29, 2014
Method for molecular bonding of silicon and glass substrates
SOITEC SILICON ON INSULATOR2 citations62
US8349703B2Jan 8, 2013
Method of bonding two substrates
SOITEC SILICON ON INSULATOR2 citations62
US7485545B2Feb 3, 2009
Method of configuring a process to obtain a thin layer with a low density of holes
SOITEC SILICON ON INSULATOR4 citations62
US12362226B2Jul 15, 2025
Method for forming a handling substrate for a composite structure intended for RF applications and handling substrate
SOITEC SILICON ON INSULATOR0 citations60
US12525483B2Jan 13, 2026
Method for transferring a thin layer onto a support substrate provided with a charge-trapping layer
SOITEC SILICON ON INSULATOR0 citations52
US11205702B2Dec 21, 2021
Method for manufacturing a structure for forming a tridimensional monolithic integrated circuit
SOITEC SILICON ON INSULATOR0 citations52
US11373898B2Jun 28, 2022
Method for manufacturing a semiconductor on insulator type structure by layer transfer
SOITEC SILICON ON INSULATOR0 citations47
US7919391B2Apr 5, 2011
Methods for preparing a bonding surface of a semiconductor wafer
SOITEC SILICON ON INSULATOR0 citations38
CORNING INC
4 patentsUS6563631B2May 13, 2003
Tunable gain-clamped semiconductor optical amplifier
CORNING INC56 citations90
US8357974B2Jan 22, 2013
Semiconductor on glass substrate with stiffening layer and process of making the same
CORNING INC8 citations82
US6459158B1Oct 1, 2002
Vertically-tolerant alignment using slanted wall pedestal
CORNING INC8 citations70
US8772875B2Jul 8, 2014
Semiconductor on glass substrate with stiffening layer
CORNING INC0 citations50