Inventor
HSU PETER Y
US16 patents
⚠️ This page may combine multiple inventors who share the name “HSU PETER Y”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
10 patentsUS6549220B1Apr 15, 2003
Method, system, and program for providing pages of information with navigation and content areas
IBM98 citations97
US6216988B1Apr 17, 2001
Integrated wrist rest
IBM73 citations96
US7483899B2Jan 27, 2009
Conversation persistence in real-time collaboration system
IBM40 citations95
US7698229B2Apr 13, 2010
Method and apparatus for trading digital items in a network data processing system
IBM45 citations92
US7064657B2Jun 20, 2006
Method and system for accessing and viewing images of a vehicle interior
IBM51 citations92
US7958055B2Jun 7, 2011
Method and apparatus for temporary ownership of digital items in a network data processing system
IBM9 citations84
US8001126B2Aug 16, 2011
Conversation persistence in real-time collaboration system
IBM13 citations83
US8035050B1Oct 11, 2011
Deformable cap for a computer pointing device
IBM6 citations74
US6405105B1Jun 11, 2002
Method means and device for limiting the light penetration through one or more pane in a single viewing port
IBM11 citations67
US7991741B2Aug 2, 2011
System and method for synchronizing data record with web document in a content management system
IBM2 citations61
SILICON GRAPHICS INC
5 patentsUS5526504AJun 11, 1996
Variable page size translation lookaside buffer
SILICON GRAPHICS INC166 citations96
US5572704ANov 5, 1996
System and method for controlling split-level caches in a multi-processor system including data loss and deadlock prevention schemes
SILICON GRAPHICS INC91 citations94
US5537538AJul 16, 1996
Debug mode for a superscalar RISC processor
SILICON GRAPHICS INC58 citations94
US5510934AApr 23, 1996
Memory system including local and global caches for storing floating point and integer data
SILICON GRAPHICS INC87 citations94
US5740402AApr 14, 1998
Conflict resolution in interleaved memory systems with multiple parallel accesses
SILICON GRAPHICS INC117 citations93