Inventor
RODMAN PAUL
US18 patents
⚠️ This page may combine multiple inventors who share the name “RODMAN PAUL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
RESHAPE INC
9 patentsUS6564363B1May 13, 2003
Method and system for implementing a graphical user interface for defining and linking multiple attach points for multiple blocks of an integrated circuit netlist
RESHAPE INC35 citations95
US6564364B1May 13, 2003
Method and system for maintaining element abstracts of an integrated circuit netlist using a master library file and modifiable master library file
RESHAPE INC36 citations95
US6557153B1Apr 29, 2003
Method and system for implementing a user interface for performing physical design operations on an integrated circuit netlist
RESHAPE INC62 citations95
US6553554B1Apr 22, 2003
Method and system for implementing a graphical user interface for depicting loose fly line interconnections between multiple blocks of an integrated circuit netlist
RESHAPE INC50 citations95
US6574788B1Jun 3, 2003
Method and system for automatically generating low level program commands as dependency graphs from high level physical design stages
RESHAPE INC72 citations93
US6865721B1Mar 8, 2005
Optimization of the top level in abutted-pin hierarchical physical design
RESHAPE INC18 citations92
US6757874B1Jun 29, 2004
Facilitating verification in abutted-pin hierarchical physical design
RESHAPE INC13 citations92
US6857116B1Feb 15, 2005
Optimization of abutted-pin hierarchical physical design
RESHAPE INC7 citations73
US6854093B1Feb 8, 2005
Facilitating press operation in abutted-pin hierarchical physical design
RESHAPE INC5 citations73
SILICON GRAPHICS INC
3 patentsUS5954815ASep 21, 1999
Invalidating instructions in fetched instruction blocks upon predicted two-step branch operations with second operation relative target address
SILICON GRAPHICS INC65 citations95
US5537538AJul 16, 1996
Debug mode for a superscalar RISC processor
SILICON GRAPHICS INC58 citations94
US5510934AApr 23, 1996
Memory system including local and global caches for storing floating point and integer data
SILICON GRAPHICS INC87 citations94
MAGMA DESIGN AUTOMATION INC
3 patentsUS7185305B1Feb 27, 2007
Creating a power distribution arrangement with tapered metal wires for a physical design
MAGMA DESIGN AUTOMATION INC22 citations92
US7114142B1Sep 26, 2006
Optimizing locations of pins for blocks in a hierarchical physical design by using physical design information of a prior hierarchical physical design
MAGMA DESIGN AUTOMATION INC15 citations90
US7155693B1Dec 26, 2006
Floorplanning a hierarchical physical design to improve placement and routing
MAGMA DESIGN AUTOMATION INC18 citations84
MIPS TECH INC
2 patentsUS6691221B2Feb 10, 2004
Loading previously dispatched slots in multiple instruction dispatch buffer before dispatching remaining slots for parallel execution
MIPS TECH INC52 citations95
US6247124B1Jun 12, 2001
Branch prediction entry with target line index calculated using relative position of second operation of two step branch operation in a line of instructions
MIPS TECH INC47 citations95