Inventor
SCANLON JOSEPH T
US6 patents
Patents
6 patentsUS5526504AJun 11, 1996
Variable page size translation lookaside buffer
SILICON GRAPHICS INC166 citations96
US5572704ANov 5, 1996
System and method for controlling split-level caches in a multi-processor system including data loss and deadlock prevention schemes
SILICON GRAPHICS INC91 citations94
US5537538AJul 16, 1996
Debug mode for a superscalar RISC processor
SILICON GRAPHICS INC58 citations94
US5510934AApr 23, 1996
Memory system including local and global caches for storing floating point and integer data
SILICON GRAPHICS INC87 citations94
US5740402AApr 14, 1998
Conflict resolution in interleaved memory systems with multiple parallel accesses
SILICON GRAPHICS INC117 citations93
US5632025AMay 20, 1997
Method for preventing multi-level cache system deadlock in a multi-processor system
SILICON GRAPHICS INC82 citations92