Inventor

FRICKE NIELS

DE21 patents

⚠️ This page may combine multiple inventors who share the name “FRICKE NIELS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FRICKE NIELS

IBM

Optimization of integrated circuit physical design

Program counter (PC)-relative load and store addressing for fused instructions

Fusion to enhance early address generation of load instructions in a microprocessor

In-pipe error scrubbing within a processor core

Method for calculating an effect on timing of moving a pin from an edge to an inboard position in processing large block synthesis (LBS)

High throughput data flow for SHA-2 hashing module

Thread-based organization of slice target register file entry in a microprocessor to permit writing scalar or vector data to portions of a single register file entry

Low latency execution of floating-point record form instructions

On-the-fly adjustment of issue-write back latency to avoid write back collisions using a result buffer

Arithmetic logic unit for single-cycle fusion operations

Arithmetic logic unit for single-cycle fusion operations

Method for calculating an effect on timing of moving a pin from an edge to an inboard position in processing large block synthesis (LBS)

Method to determine the oldest instruction in an instruction queue of a processor with multiple instruction threads

Banked slice-target register file for wide dataflow execution in a microprocessor

Hardware-based implementation of secure hash algorithms

Low latency execution of floating-point record form instructions

Low latency execution of floating-point record form instructions

Cracked execution of move-to-FPSCR instructions

Hardware-based message block padding for hash algorithms

Method to execute successive dependent instructions from an instruction stream in a processor

FRICKE NIELS

Method and data processing system to optimize performance of an electric circuit design, data processing program and computer program product