P

Inventor

HENG FOOK-LUEN

US48 patents
⚠️ This page may combine multiple inventors who share the name “HENG FOOK-LUEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

25 patents
US7353492B2Apr 1, 2008

Method of IC fabrication, IC mask fabrication and program product therefor

IBM222 citations99
US7484197B2Jan 27, 2009

Minimum layout perturbation-based artwork legalization with grid constraints for hierarchical designs

IBM297 citations98
US7302651B2Nov 27, 2007

Technology migration for integrated circuits with radical design restrictions

IBM209 citations98
US6083275AJul 4, 2000

Optimized phase shift design migration

IBM137 citations98
US5535134AJul 9, 1996

Object placement aid

IBM110 citations98
US6189132B1Feb 13, 2001

Design rule correction system and method

IBM126 citations96
US7536664B2May 19, 2009

Physical design system and method

IBM44 citations95
US6832364B2Dec 14, 2004

Integrated lithographic layout optimization

IBM48 citations93
US7363601B2Apr 22, 2008

Integrated circuit selective scaling

IBM19 citations92
US7269817B2Sep 11, 2007

Lithographic process window optimization under complex constraints on edge placement

IBM23 citations92
US7257783B2Aug 14, 2007

Technology migration for integrated circuits with radical design restrictions

IBM12 citations92
US6383847B1May 7, 2002

Partitioned mask layout

IBM35 citations92
US7676775B2Mar 9, 2010

Method to determine the root causes of failure patterns by using spatial correlation of tester data

IBM30 citations90
US6986109B2Jan 10, 2006

Practical method for hierarchical-preserving layout optimization of integrated circuit layout

IBM38 citations90
US9536214B2Jan 3, 2017

Weather-driven multi-category infrastructure impact forecasting

IBM7 citations83
US7882463B2Feb 1, 2011

Integrated circuit selective scaling

IBM8 citations83
US7761821B2Jul 20, 2010

Technology migration for integrated circuits with radical design restrictions

IBM9 citations83
US7448018B2Nov 4, 2008

System and method for employing patterning process statistics for ground rules waivers and optimization

IBM9 citations82
US8020120B2Sep 13, 2011

Layout quality gauge for integrated circuit design

IBM7 citations80
US7610565B2Oct 27, 2009

Technology migration for integrated circuits with radical design restrictions

IBM6 citations73
US7831941B2Nov 9, 2010

CA resistance variability prediction methodology

IBM5 citations62
US7084476B2Aug 1, 2006

Integrated circuit logic with self compensating block delays

IBM3 citations62
US10521525B2Dec 31, 2019

Quantifying a combined effect of interdependent uncertain resources in an electrical power grid

IBM1 citations61
US7302671B2Nov 27, 2007

Integrated circuit logic with self compensating shapes

IBM0 citations51
US7962865B2Jun 14, 2011

System and method for employing patterning process statistics for ground rules waivers and optimization

IBM1 citations50

UTOPUS INSIGHTS INC

12 patents

HENG FOOK-LUEN

4 patents

COHN JOHN M

3 patents

BAGHERI SAEED

2 patents

ALLEN ROBERT J

1 patent

HAN GENG

1 patent