Inventor
LEHNERT FRANK
DE42 patents
⚠️ This page may combine multiple inventors who share the name “LEHNERT FRANK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
26 patentsUS10380033B2Aug 13, 2019
Multi-engine address translation facility
IBM6 citations84
US6766434B2Jul 20, 2004
Method for sharing a translation lookaside buffer between CPUs
IBM18 citations84
US10380032B2Aug 13, 2019
Multi-engine address translation facility
IBM1 citations73
US10083124B1Sep 25, 2018
Translating virtual memory addresses to physical addresses
IBM6 citations73
US10025608B2Jul 17, 2018
Quiesce handling in multithreaded environments
IBM4 citations73
US9207706B2Dec 8, 2015
Generating monotonically increasing TOD values in a multiprocessor system
IBM3 citations63
US11036647B2Jun 15, 2021
Suspending translation look-aside buffer purge execution in a multi-processor environment
IBM0 citations62
US10956341B2Mar 23, 2021
Multi-engine address translation facility
IBM0 citations62
US10929312B2Feb 23, 2021
Zone-SDID mapping scheme for TLB purges
IBM0 citations62
US10635603B2Apr 28, 2020
Multi-engine address translation facility
IBM0 citations52
US10621105B2Apr 14, 2020
Multi-engine address translation facility
IBM0 citations52
US10353827B2Jul 16, 2019
Zone-SDID mapping scheme for TLB purges
IBM0 citations52
US10353828B2Jul 16, 2019
Zone-SDID mapping scheme for TLB purges
IBM0 citations52
US10176002B2Jan 8, 2019
Quiesce handling in multithreaded environments
IBM0 citations52
US9760511B2Sep 12, 2017
Efficient interruption routing for a multithreaded processor
IBM1 citations52
US9715458B2Jul 25, 2017
Multiprocessor computer system
IBM1 citations52
US9678830B2Jun 13, 2017
Recovery improvement for quiesced systems
IBM0 citations52
US9665424B2May 30, 2017
Recovery improvement for quiesced systems
IBM0 citations52
US9658852B2May 23, 2017
Updating of shadow registers in N:1 clock domain
IBM1 citations52
US10698835B2Jun 30, 2020
Suspending translation look-aside buffer purge execution in a multi-processor environment
IBM0 citations51
US10387326B2Aug 20, 2019
Incorporating purge history into least-recently-used states of a translation lookaside buffer
IBM0 citations51
US10353825B2Jul 16, 2019
Suspending translation look-aside buffer purge execution in a multi-processor environment
IBM0 citations51
US10289562B2May 14, 2019
Incorporating purge history into least-recently-used states of a translation lookaside buffer
IBM0 citations51
US10248575B2Apr 2, 2019
Suspending translation look-aside buffer purge execution in a multi-processor environment
IBM0 citations51
US9311137B2Apr 12, 2016
Delaying interrupts for a transactional-execution facility
IBM0 citations41
US7650535B2Jan 19, 2010
Array delete mechanisms for shipping a microprocessor with defective arrays
IBM0 citations39
BELIMO HOLDING AG
5 patentsUS7931525B2Apr 26, 2011
Air flow control in a ventilating pipe
BELIMO HOLDING AG5 citations63
US12146580B2Nov 19, 2024
Actuator and method of operating the actuator
BELIMO HOLDING AG0 citations61
US11391386B2Jul 19, 2022
Actuator and method of operating the actuator
BELIMO HOLDING AG1 citations61
US11448410B2Sep 20, 2022
Method of monitoring an air flow in a zone of an HVAC system
BELIMO HOLDING AG0 citations50
US12595930B2Apr 7, 2026
HVAC system and related methods
BELIMO HOLDING AG0 citations40
RUETI AG MASCHF
3 patentsUS6164342ADec 26, 2000
Method and apparatus for adjustable weft thread insertion in rapier weaving machine
RUETI AG MASCHF10 citations73
US5890519AApr 6, 1999
Apparatus for controlling a warp tensioner of a weaving machine
RUETI AG MASCHF9 citations73
US5666998ASep 16, 1997
Cantilevered sensor for the thread tension detector
RUETI AG MASCHF15 citations73