Inventor

AMIRKHANY AMIR

US100 patents

⚠️ This page may combine multiple inventors who share the name “AMIRKHANY AMIR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

AMIRKHANY AMIR

RAMBUS INC

Adjustable dual-band link

Adjustable dual-band link

Adjustable dual-band link

Linear transformation circuits

Folded memory modules

Semiconductor memory systems with on-die data buffering

Memory rank and ODT configuration in a memory system

Semiconductor memory systems with on-die data buffering

Semiconductor memory systems with on-die data buffering

Optimizing power in a memory device

Folded memory modules

Semiconductor memory systems with on-die data buffering

Optimizing power in a memory device

Semiconductor memory systems with on-die data buffering

Semiconductor memory systems with on-die data buffering

Multi-tone system with oversampled precoders

Crosstalk reduction coding schemes

On-chip regulator with variable load compensation

Optimizing power in a memory device

Optimizing power in a memory device

Optimizing power in a memory device

Data buffer with a strobe-based primary interface and a strobe-less secondary interface

Offset and decision feedback equalization calibration

On-chip regulator with variable load compensation

SAMSUNG DISPLAY CO LTD

Calibration technique for a tap value in decision feedback equalizers

System and method for setting analog front end DC gain

CML quarter-rate predictive feedback equalizer architecture

Bimodal serial link CDR architecture

Point to multi-point clock-forwarded signaling for large displays

Systems and methods for symbol-spaced pattern-adaptable dual loop clock recovery for high speed serial links

Low power architecture for mobile displays

Method and apparatus for duty-cycle correction in a serial data transmitter

System and method for setting analog front end DC gain

Display panel having self-refresh capability

Body-biased slicer design for predictive decision feedback equalizers

Low-latency high-gain current-mode logic slicer

Method of startup sequence for a panel interface

System for relayed data transmission in a high-speed serial link

Apparatus and method for offset cancellation in duty cycle corrections

Low overhead on chip scope

Correlated double sampling pixel sensing front end

High resolution voltage-mode driver

Average and decimate operations for bang-bang phase detectors

AMIRKHANY AMIR

Coded differential intersymbol interference reduction

Multi-modal communication interface

High resolution output driver

LEIBOWITZ BRIAN S

On-chip regulator with variable load compensation

ABBASFAR ALIAZAM

Multi-mode transmitter

KAVIANI KAMBIZ

Offset and decision feedback equalization calibration

FAZEEL HAJEE MOHAMMED SHUAEB

Methods and circuits for calibrating multi-modal termination schemes