Inventor

SUKEKAWA MITSUNARI

JP45 patents

⚠️ This page may combine multiple inventors who share the name “SUKEKAWA MITSUNARI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SUKEKAWA MITSUNARI

MICRON TECHNOLOGY INC

Methods of forming integrated circuitry

Methods of forming integrated circuitry

Semiconductor constructions having grooves dividing active regions

Integrated circuitry

Integrated assemblies comprising memory cells and shielding material between the memory cells

Semiconductor memory device and method of forming the same

Integrated assemblies comprising memory cells and shielding material between the memory cells, and methods of forming integrated assemblies

Methods of forming integrated circuitry

Methods of forming integrated circuitry

Memory device with bitline noise suppressing scheme

Semiconductor memory device having plural chips connected by hybrid bonding method

Methods of forming integrated circuitry

Methods of forming integrated circuitry

Semiconductor memory device having plural chips connected by hybrid bonding method

Integrated assemblies comprising voids between active regions and conductive shield plates, and methods of forming integrated assemblies

Integrated assemblies comprising spaces between bitlines and comprising conductive plates operationally proximate the bitlines, and methods of forming integrated assemblies

Semiconductor memory device and method of forming the same

Array of capacitors, an array of memory cells, a method of forming an array of capacitors, and a method of forming an array of memory cells

Method of forming a semiconductor device

Array of capacitors, an array of memory cells, a method of forming an array of capacitors, and a method of forming an array of memory cells

Compact microelectronic 6T SRAM memory devices, and related systems and methods

Semiconductor device

Semiconductor device and method of forming the same

Semiconductor device and method of forming the same

Integrated circuit constructions comprising memory and methods used in the formation of integrated circuitry comprising memory

Assemblies which include wordlines over gate electrodes

Apparatuses including capacitor structures, and related memory devices, electronic systems, and methods

Integrated circuit constructions comprising memory and methods used in the formation of integrated circuitry comprising memory

Methods of compensating for misalignment of bonded semiconductor wafers

Assemblies which include wordlines over gate electrodes

Conductive layers in memory array region and methods for forming the same

Semiconductor device and method of forming the same

Bit line noise suppression and related apparatuses, methods, and computing systems

Array of recessed access devices and an array of memory cells individually comprising a capacitor and a transistor

NEC CORP

Method of fabricating a semiconductor device

Method for manufacturing semiconductor device

Semiconductor memory device and manufacturing method and mask data preparing method for the same

Semiconductor memory device and manufacturing method and mask data preparing method for the same

SUKEKAWA MITSUNARI

Semiconductor device, method for forming the same, and data processing system

Method of manufacturing semiconductor device including sequentially forming first and second mask material layers and forming a dotted photoresist pattern on the second mask material layer

Method for manufacturing mask

Semiconductor memory device and method of manufacturing the same

ELPIDA MEMORY INC

Method for manufacturing mask

Semiconductor integrated circuit device including a silicon layer formed on a diffusion layer

PS4 LUXCO SARL

Semiconductor device and manufacturing method thereof