Inventor
HIRAYAMA KAZUTOSHI
JP15 patents
Patents
15 patentsUS6519194B2Feb 11, 2003
Semiconductor memory device with a rapid packet data input, capable of operation check with low speed tester
MITSUBISHI ELECTRIC CORP61 citations95
US6301190B1Oct 9, 2001
Semiconductor memory device with a rapid packet data input, capable of operation check with low speed tester
MITSUBISHI ELECTRIC CORP19 citations92
US5663905ASep 2, 1997
Semiconductor memory device comprising two kinds of memory cells operating in different access speeds and methods of operating and manufacturing the same
MITSUBISHI ELECTRIC CORP35 citations92
US5343429AAug 30, 1994
Semiconductor memory device having redundant circuit and method of testing to see whether or not redundant circuit is used therein
MITSUBISHI ELECTRIC CORP26 citations92
US4833650AMay 23, 1989
Semiconductor memory device including programmable mode selection circuitry
MITSUBISHI ELECTRIC CORP39 citations92
US4808844AFeb 28, 1989
Semiconductor device
MITSUBISHI ELECTRIC CORP37 citations92
US5111078AMay 5, 1992
Input circuit for logic circuit having node and operating method therefor
MITSUBISHI ELECTRIC CORP20 citations82
US5781468AJul 14, 1998
Semiconductor memory device comprising two kinds of memory cells operating in different access speeds and methods of operating and manufacturing the same
MITSUBISHI ELECTRIC CORP13 citations74
US5835434ANov 10, 1998
Internal voltage generating circuit, semiconductor memory device, and method of measuring current consumption, capable of measuring current consumption without cutting wire
MITSUBISHI ELECTRIC CORP8 citations73
US5666317ASep 9, 1997
Semiconductor memory device
MITSUBISHI ELECTRIC CORP14 citations73
US5574691ANov 12, 1996
Semiconductor memory device having circuit for activating predetermined rows of memory cells upon detection of disturb refresh test
MITSUBISHI ELECTRIC CORP14 citations73
US5519659AMay 21, 1996
Semiconductor memory device having circuit for activating predetermined rows of memory cells upon detection of disturb refresh test
MITSUBISHI ELECTRIC CORP13 citations73
US5315551AMay 24, 1994
Semiconductor memory device with precharging voltage level unchanged by defective memory cell
MITSUBISHI ELECTRIC CORP9 citations73
US5065365ANov 12, 1991
Semiconductor memory device carrying out reading and writing operations in order in one operating cycle and operating method therefor
MITSUBISHI ELECTRIC CORP9 citations73
US4835743AMay 30, 1989
Semiconductor memory device performing multi-bit Serial operation
MITSUBISHI ELECTRIC CORP4 citations63