Inventor

THAYER JOHN S

US27 patents

⚠️ This page may combine multiple inventors who share the name “THAYER JOHN S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

THAYER JOHN S

COMPAQ COMPUTER CORP

System and method for conditionally moving an operand from a source register to a destination register

Expansion device configuration system having two configuration modes which uses automatic expansion configuration sequence during first mode and configures the device individually during second mode

Load and store instructions which perform unpacking and packing of data bits in separate vector and integer cache storage

Programmable logic system for filtering commands to a microprocessor

MPEG motion compensation using operand routing and performing add and divide in a single instruction

System and method for routing one operand to arithmetic logic units from fixed register slots and another operand from any register slot

System and method for performing an accumulate operation on one or more operands within a partitioned register

System and method for routing operands within partitions of a source register to partitions within a destination register

Combined synchronous and asynchronous memory controller

Delaying arbitration of bus access in digital computers

Computer having multimedia operations executable as two distinct sets of operations within a single instruction cycle

Enhanced wavetable processing technique on a vector processor having operand routing and slot selectable operations

Apparatus for routing one operand to an arithmetic logic unit from a fixed register slot and another operand from any register slot

Enhanced fast fourier transform technique on vector processor with operand routing and slot-selectable operation

DMA controller which can be controlled by host and local processors

System fpr transferring data between two buses using control registers writable by host processor connected to system bus and local processor coupled to local bus

Apparatus for aligning and padding data on transfers between devices of different data widths and organizations

Memory accessing system with an interface and memory selection unit utilizing write protect and strobe signals

Enhanced adaptive filtering technique

Programmable logic system for filtering commands to a microprocessor

Line drawing using operand routing and operation selective multimedia extension unit

Bit map stretching using operand routing and operation selective multimedia extension unit

Computer system having an internal cach microprocessor slowdown circuit providing an external address signal

ADVANCED MICRO DEVICES INC

System and method for conditional moving an operand from a source register to destination register

Decoding operands for multimedia applications instruction coded with less number of bits than combination of register slots and selectable specific values

Microprocessor modified to perform inverse discrete cosine transform operations on a one-dimensional matrix of numbers within a minimal number of instructions

COMPAQ COMPUTER CORP AND ADVAN

Computer modified to perform inverse discrete cosine transform operations on a one-dimensional matrix of numbers within a minimal number of instruction cycles