Inventor
FREY BRADLY GEORGE
US11 patents
⚠️ This page may combine multiple inventors who share the name “FREY BRADLY GEORGE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
8 patentsUS6338119B1Jan 8, 2002
Method and apparatus with page buffer and I/O page kill definition for improved DMA and L1/L2 cache performance
IBM55 citations95
US7904661B2Mar 8, 2011
Data stream prefetching in a microprocessor
IBM32 citations92
US7350029B2Mar 25, 2008
Data stream prefetching in a microprocessor
IBM22 citations92
US5835738ANov 10, 1998
Address space architecture for multiple bus computer systems
IBM118 citations92
US11797713B2Oct 24, 2023
Systems and methods for dynamic control of a secure mode of operation in a processor
IBM2 citations72
US12223098B2Feb 11, 2025
Systems and methods for dynamic control of a secure mode of operation in a processor
IBM0 citations62
US7827343B2Nov 2, 2010
Method and apparatus for providing accelerator support in a bus protocol
IBM3 citations62
US11461474B2Oct 4, 2022
Process-based virtualization system for executing a secure application process
IBM0 citations51
FREY BRADLY GEORGE
3 patentsUS8140759B2Mar 20, 2012
Specifying an access hint for prefetching partial cache block data in a cache hierarchy
FREY BRADLY GEORGE12 citations81
US8589657B2Nov 19, 2013
Operating system management of address-translation-related data structures and hardware lookasides
FREY BRADLY GEORGE2 citations60
US8645667B2Feb 4, 2014
Operating system management of address-translation-related data structures and hardware lookasides
FREY BRADLY GEORGE0 citations50