Inventor

ODANAKA SHINJI

JP46 patents

⚠️ This page may combine multiple inventors who share the name “ODANAKA SHINJI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ODANAKA SHINJI

MATSUSHITA ELECTRIC INDUSTRIAL CO LTD

Method for planning layout for LSI pattern, method for forming LSI pattern and method for generating mask data for LSI

Method for planning layout for LSI pattern, method for forming LSI pattern and method for generating mask data for LSI

Method for fabricating a semiconductor device having a pocket dopant diffused layer

Method of forming MOSFET with channel, extension and pocket implants

Nonvolatile semiconductor memory device and method for fabricating the same and semiconductor integrated circuit

MOS type semiconductor device having a low concentration impurity diffusion region

Quantum device and fabrication method thereof

Method for planning layout for LSI pattern, method for forming LSI pattern and method for generating mask data for LSI

Nonvolatile semiconductor device capable of increased electron injection efficiency

Nonvolatile semiconductor memory device and method for fabricating the same, and semiconductor integrated circuit device

Nonvolatile semiconductor memory device and method for fabricating the same, and semiconductor integrated circuit device

Semiconductor device and method for fabricating the same

Nonvolatile semiconductor memory device and method for fabricating the same and semiconductor integrated circuit

Method of manufacture for semiconductor device by forming deep and shallow regions

Structure and method of manufacture for semiconductor device

Method for fabricating semiconductor device

Method for manufacturing semiconductor device

Complementary semiconductor device and method for producing the same

Method for forming complementary MOS device having asymmetric region in channel region

MIS transistor with gate sidewall insulating layer

Semiconductor device having reduced gate overlapping capacitance

Method of proudcing a MIS transistor

Nonvolatile semiconductor memory device and method for fabricating the same

Nonvolatile semiconductor memory device and method for fabricating the same

Method of making a trench capacitor dram cell

Semiconductor memory device and method of fabricating the same

Semiconductor device and method of fabricating the same

Method for manufacturing semiconductor device

Unsymmetrical MOS device having a gate insulator area offset from the source and drain areas, and ESD protection circuit including such a MOS device

Method of producing semiconductor device with viscous flow of silicon oxide

Semiconductor device for protecting an internal circuit from electrostatic damage

Method of producing semiconductor device

MOS type semiconductor device having an impurity diffusion layer with a nonuniform impurity concentration profile in a channel region

MOS transistor and its fabricating method

LDD FET with polysilicon sidewalls

Nonvolatile semiconductor memory device and method for fabricating the same

Method for manufacturing a nonvolatile semiconductor memory device having increased hot electron injection efficiency

MOS type semiconductor device having an impurity diffusion layer

Nonvolatile semiconductor memory device and method for fabricating the same

Nonvolatile semiconductor memory device and method for fabricating the same

Nonvolatile semiconductor memory device and method for fabricating the same

Nonvolatile semiconductor memory device which can operate at high speed with low voltage, and manufacturing method there

MATSUSHITA ELECTRIC IND CO LD

Semiconductor device and process

MISAKA AKIO

Changing a design rule for forming LSI pattern based on evaluating effectiveness of optical proximity corrected patterns

MATSUSHITA ELECTRONICS CORP

Semiconductor device and method of fabricating the same

MATSUSHITA ELECTRIC CO LTD

Nonvolatile semiconductor memory device and method for fabricating the same