Inventor
AUBERTINE DANIEL B
US23 patents
⚠️ This page may combine multiple inventors who share the name “AUBERTINE DANIEL B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
17 patentsUS9343559B2May 17, 2016
Nanowire transistor devices and forming techniques
INTEL CORP25 citations94
US9812524B2Nov 7, 2017
Nanowire transistor devices and forming techniques
INTEL CORP13 citations84
US9653584B2May 16, 2017
Pre-sculpting of Si fin elements prior to cladding for transistor channel applications
INTEL CORP7 citations84
US9184294B2Nov 10, 2015
High mobility strained channels for fin-based transistors
INTEL CORP11 citations84
US10373977B2Aug 6, 2019
Transistor fin formation via cladding on sacrificial core
INTEL CORP6 citations73
US9893149B2Feb 13, 2018
High mobility strained channels for fin-based transistors
INTEL CORP3 citations73
US11171058B2Nov 9, 2021
Self-aligned 3-D epitaxial structures for MOS device fabrication
INTEL CORP0 citations62
US10879241B2Dec 29, 2020
Techniques for controlling transistor sub-fin leakage
INTEL CORP1 citations62
US10396203B2Aug 27, 2019
Pre-sculpting of Si fin elements prior to cladding for transistor channel applications
INTEL CORP0 citations52
US10014412B2Jul 3, 2018
Pre-sculpting of Si fin elements prior to cladding for transistor channel applications
INTEL CORP0 citations52
US10559689B2Feb 11, 2020
Crystallized silicon carbon replacement material for NMOS source/drain regions
INTEL CORP0 citations51
US9660078B2May 23, 2017
Enhanced dislocation stress transistor
INTEL CORP0 citations51
US9231076B2Jan 5, 2016
Enhanced dislocation stress transistor
INTEL CORP0 citations51
US9076814B2Jul 7, 2015
Enhanced dislocation stress transistor
INTEL CORP0 citations51
US10084087B2Sep 25, 2018
Enhanced dislocation stress transistor
INTEL CORP0 citations50
US7833883B2Nov 16, 2010
Precursor gas mixture for depositing an epitaxial carbon-doped silicon film
INTEL CORP1 citations46
US10403626B2Sep 3, 2019
Fin sculpting and cladding during replacement gate process for transistor channel applications
INTEL CORP0 citations42
GLASS GLENN A
3 patentsUS9728464B2Aug 8, 2017
Self-aligned 3-D epitaxial structures for MOS device fabrication
GLASS GLENN A28 citations94
US9012284B2Apr 21, 2015
Nanowire transistor devices and forming techniques
GLASS GLENN A37 citations94
US8957476B2Feb 17, 2015
Conversion of thin transistor elements from silicon to silicon germanium
GLASS GLENN A16 citations84