Inventor
GOYAL PRADEEP
IN9 patents
⚠️ This page may combine multiple inventors who share the name “GOYAL PRADEEP”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CADENCE DESIGN SYSTEMS INC
6 patentsUS8990746B1Mar 24, 2015
Method for mutation coverage during formal verification
CADENCE DESIGN SYSTEMS INC15 citations82
US8910099B1Dec 9, 2014
Method for debugging unreachable design targets detected by formal verification
CADENCE DESIGN SYSTEMS INC10 citations82
US10108767B1Oct 23, 2018
Methods, systems, and computer program product for implementing deadlock detection with formal verification techniques in an electronic design
CADENCE DESIGN SYSTEMS INC5 citations67
US10380301B1Aug 13, 2019
Method for waveform based debugging for cover failures from formal verification
CADENCE DESIGN SYSTEMS INC4 citations63
US10176286B1Jan 8, 2019
System, method, and computer program product for oscillating loop detection in formal verification
CADENCE DESIGN SYSTEMS INC0 citations51
US10031990B1Jul 24, 2018
System, method, and computer program product for analyzing X-propagation failures in formal verification
CADENCE DESIGN SYSTEMS INC0 citations33