Inventor

DUNN DERREN N

US18 patents

⚠️ This page may combine multiple inventors who share the name “DUNN DERREN N”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DUNN DERREN N

IBM

Structure to improve adhesion between top CVD low-k dielectric and dielectric capping layer

Structure to improve adhesion between top CVD low-k dielectric and dielectric capping layer

Generative adversarial networks for generating physical design layout patterns of integrated multi-layers

Generative adversarial networks for generating physical design layout patterns

Automatic generation of via patterns with coordinate-based recurrent neural network (RNN)

PE-ALD of TaN diffusion barrier region on low-k materials

Automatic generation of via patterns with coordinate-based recurrent neural network (RNN)

Coordinates-based variational autoencoder for generating synthetic via layout patterns

Coordinates-based generative adversarial networks for generating synthetic physical design layout patterns

Generating synthetic layout patterns by feedforward neural network based variational autoencoders

Co-modeling post-lithography critical dimensions and post-etch critical dimensions with multi-task neural networks

Electrical mask validation

Semiconductor structure for optical validation

Electrical mask validation

Optical mask validation

Mask process aware calibration using mask pattern fidelity inspections

Modeling post-lithography stochastic critical dimension variation with multi-task neural networks

DUNN DERREN N

Pattern improvement in multiprocess patterning