Inventor

SUNG HSUEH-CHANG

TW100 patents

⚠️ This page may combine multiple inventors who share the name “SUNG HSUEH-CHANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SUNG HSUEH-CHANG

TAIWAN SEMICONDUCTOR MFG CO LTD

MOS devices having epitaxy regions with reduced facets

Method of forming epitaxial fin structures of finFET

Semiconductor structure and fabricating method thereof

Barrier layer above anti-punch through (APT) implant region to improve mobility of channel region of fin field effect transistor (FinFET) device structure

Silicon germanium p-channel FinFET stressor structure and method of making same

Germanium profile for channel strain

MOS devices with non-uniform P-type impurity profile

Source and drain stressors with recessed top surfaces

Controlling the shape of source/drain regions in FinFETs

Transistor strain-inducing scheme

Interfacial layer between fin and source/drain region

Epitaxial fin structures of finFET having an epitaxial buffer region and an epitaxial capping region

Semiconductor device and method

Semiconductor device and method

Epitaxial fin structures having an epitaxial buffer region and an epitaxial capping region

Method of manufacturing a semiconductor device

Methods of forming semiconductor devices having plural epitaxial layers

FinFET device and method

Epitaxial source/drain structure and method of forming same

Profile design for improved device performance

Source and drain stressors with recessed top surfaces

Source and drain stressors with recessed top surfaces

MOS devices having epitaxy regions with reduced facets

Method for making source and drain regions of a MOSFET with embedded germanium-containing layers having different germanium concentration

Semiconductor structure and fabricating method thereof

MOS devices having epitaxy regions with reduced facets

Semiconductor device and method

Semiconductor device and method

Protective layer over FinFET and method of forming same

Epitaxial fin structures of FINFET having an epitaxial buffer region and an epitaxial capping region

Method of forming devices with strained source/drain structures

Epitaxial source/drain structure and method of forming same

Doping profile for strained source/drain region

TAIWAN SEMICONDUCTOR MFG

Controlling the shape of source/drain regions in FinFETs

Controlling the shape of source/drain regions in FinFETs

MOS device having source and drain regions with embedded germanium-containing diffusion barrier

MOS devices having epitaxy regions with reduced facets

Silicon layer for stopping dislocation propagation

Silicon layer for stopping dislocation propagation

Reducing pattern loading effect in epitaxy

SU CHIEN-CHANG

Epitaxy profile engineering for FinFETs

Epitaxy profile engineering for FinFETs

Method for incorporating impurity element in EPI silicon process

KWOK TSZ-MEI

Semiconductor devices with strained source/drain structures

Method of manufacturing strained source/drain structures

CHEN KUAN-YU

Method for improving selectivity of epi process

CHENG CHUN-FAI

Transistors having a composite strain structure, integrated circuits, and fabrication methods thereof

FAN WEI-HAN

Facet-free semiconductor device

SUNG HSUEH-CHANG

High performance strained source-drain structure and method of fabricating the same

HSU YU-RUNG

Method of fabricating strained structure in semiconductor device