Inventor

NAKOS JAMES S

US50 patents

⚠️ This page may combine multiple inventors who share the name “NAKOS JAMES S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NAKOS JAMES S

IBM

Nonvolatile memory cell using microelectromechanical device

Process for improving sheet resistance of an integrated circuit device gate

NVRAM cell having increased coupling ratio between a control gate and floating gate without an increase in cell area

Methods and compositions for the selective etching of silicon

Emissivity independent temperature measurement systems

NVRAM utilizing high voltage TFT device and method for making the same

Selective nitridation of gate oxides

Method for forming self-aligned dual salicide in CMOS technologies

Apparatus and method for forming a battery in an integrated circuit

Method for fabricating a nitrided silicon-oxide gate dielectric

Apparatus and method for forming a battery in an integrated circuit

Boron out-diffused surface strap process

Silicon dioxide removing method

Apparatus and method for detecting defective NVRAM cells

Process for fabricating short channel field effect transistor with a highly conductive gate

Method for fabricating a nitrided silicon-oxide gate dielectric

Methods and compositions for the selective etching of silicon

Method for forming self-aligned dual salicide in CMOS technologies

Method of fabricating a non-volatile semiconductor device

Sidewall strap

Selective nitridation of gate oxides

Thermal nitrogen distribution method to improve uniformity of highly doped ultra-thin gate capacitors

Method for forming self-aligned dual salicide in CMOS technologies

NVRAM cell using sharp tip for tunnel erase

Sidewall strap

Method of manufacturing a dual contact trench capacitor

Method of manufacturing a dual contact trench capacitor

Hydrogen barrier liner for ferro-electric random access memory (FRAM) chip

Ferroelectric random access memory with optimized hardmask

Base profile of self-aligned bipolar transistors for power amplifier applications

Base profile of self-aligned bipolar transistors for power amplifier applications

Resistor and design structure having resistor material length with sub-lithographic width

Dual contact trench resistor and capacitor in shallow trench isolation (STI) and methods of manufacture

Structure for dual contact trench capacitor and structure thereof

Thermal nitrogen distribution method to improve uniformity of highly doped ultra-thin gate capacitors

Method for conversion of commercial microprocessor to radiation-hardened processor and resulting processor

KEMERER TIMOTHY W

Embedded series deep trench capacitors and methods of manufacture

Dual contact trench resistor in shallow trench isolation (STI) and methods of manufacture

Embedded series deep trench capacitors and methods of manufacture

Dual contact trench resistor and capacitor in shallow trench isolation (STI) and methods of manufacture

Structure for dual contact trench capacitor and structure thereof

COOLBAUGH DOUGLAS D

Silicided trench contact to buried conductive layer

Silicided trench contact to buried conductive layer

HAKEY MARK C

Structure having substantially parallel resistor material lengths

Resistor and design structure having substantially parallel resistor material lengths

GLOBALFOUNDRIES INC

Deep trench decoupling capacitor and methods of forming

NAKOS JAMES S

Deep trench decoupling capacitor

CZABAJ BRIAN M

Hydrogen barrier liner for ferro-electric random access memory (FRAM) chip

BURNHAM JAY S

Method for fabricating a nitrided silicon-oxide gate dielectric

GAMBINO JEFFREY P

Ferro-electric capacitor modules, methods of manufacture and design structures